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From: Nishanth Menon <nm@ti.com>
To: Atul Garg <agarg@arasan.com>, Shawn Lin <shawn.lin@rock-chips.com>
Cc: <rk@ti.com>, <adrian.hunter@intel.com>, <kishon@ti.com>,
	<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
	<ulf.hansson@linaro.org>, <nsekhar@ti.com>
Subject: Re: [PATCH] mmc:host:sdhci-pci: Addition of Arasan PCI controller with integrated phy.
Date: Wed, 27 Sep 2017 22:10:40 -0500	[thread overview]
Message-ID: <95186e1f-98dc-1a9b-15a9-03911fd2012f@ti.com> (raw)
In-Reply-To: <CAEJoYxGzZVCJ32KqVLjLc00qOM06Rj30pPm5TrVJUB3o9ZOW+A@mail.gmail.com>

On 09/27/2017 02:27 PM, Atul Garg wrote:
> On Sep 26, 2017 8:55 PM, "Shawn Lin" <shawn.lin@rock-chips.com 
> <mailto:shawn.lin@rock-chips.com>> wrote:
>     On 2017/9/27 2:59, Atul Garg wrote:

[...]

>         ---
>            drivers/mmc/host/sdhci-pci-core.c | 372
>         ++++++++++++++++++++++++++++++++++++++
> 
> 
>     Fundamentally maybe you need a sdhci-pci-arasan.c
> 
>     And the arasan PHY isn't new here as sdhci-of-arasan already added
>     arasan PHY support for eMMC 5.1, but just with different register
>     layout and content. So could you also use generic PHY framework?
> 
> 
> Thanks. We are doing two things adding support for Arasan PCI SDHC and 
> PHY specific code to it integrated via a window in same PCI address 
> space (extended).
> 
> If we correctly understand, you are suggesting to take the PHY code 
> out as a PHY driver module similar to phy/rockchip/ and use those 
> functions from phy framework within the sdhci-pci-core?

yes, it might allow some reuse possibly as well.


-- 
Regards,
Nishanth Menon

PS: please switch to plain text.

  parent reply	other threads:[~2017-09-28  3:10 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-26 18:59 Atul Garg
2017-09-27  3:55 ` Shawn Lin
     [not found]   ` <CAEJoYxGzZVCJ32KqVLjLc00qOM06Rj30pPm5TrVJUB3o9ZOW+A@mail.gmail.com>
2017-09-28  3:10     ` Nishanth Menon [this message]
2017-10-09 20:15       ` Atul Garg

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