From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 88C564D17AE for ; Fri, 2 Oct 2026 14:26:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790951198; cv=none; b=oPtbutcrkLE+iqlspjANh5h1WLOLzg+UwDa8DAGaRbzxJ/YnnCWNpxk03LckFYfw2KkAfmGeu6KuYc7RZJBKH1WXCEDQn8pRIAiBbmkGCHmGdMN1zcyOHFIvn61xalG8xRuqUNYvqPoFoYP1qMdt+K+GjN4Td6jqby1T4nNPUmU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790951198; c=relaxed/simple; bh=G1b6+FzmJ7CQe86VL7gfDxvD8oZUy5D4lkrvIw88dW8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=c2V5gPKyQLkFlDdps/b4cET7NRgsHmeGCERxxRNzNvqjo7WEgWEGqr5w1b1iq/jTT4Bm7/nKRZ1RM/qTgD8ifkAyT+9uoH0whnW9vDmdbiUumOCh3r47t6kVNhHnPjjGGOWvjpVyn3fLA5MwXtSh9On2JJy8fe3jwyAPv4tj9s8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=aDIBqAD+; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="aDIBqAD+" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7E6AC497; Fri, 2 Oct 2026 07:26:32 -0700 (PDT) Received: from [10.0.129.26] (e122027.cambridge.arm.com [10.0.129.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6F0AF3F86F; Fri, 2 Oct 2026 07:26:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1790951195; bh=G1b6+FzmJ7CQe86VL7gfDxvD8oZUy5D4lkrvIw88dW8=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=aDIBqAD+gqPATxJKKF/+8cM8SrWmfJzHX2eIwm4daytFGk9vpipq7KJpJqqA9G8L2 Dj4cgdSqboT8ejPUIo4o1jzRMq4qXXEcPwKzc9qWkB0hIzE09A8NkNiIO7UiGCNRLL 7BqhgMVG4GukNhX0GYd+7wbGJMjaMWQS0rAZ/mvk= Message-ID: <95357e9c-5cec-4fcb-8329-9b83bfa0bea0@arm.com> Date: Fri, 2 Oct 2026 15:26:29 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v12 07/15] drm/panfrost: Explicitly enable MMU interrupts at device init To: =?UTF-8?Q?Adri=C3=A1n_Larumbe?= , Boris Brezillon , Rob Herring , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , Neil Armstrong References: <20260929-claude-fixes-v12-0-62beb08de207@collabora.com> <20260929-claude-fixes-v12-7-62beb08de207@collabora.com> From: Steven Price Content-Language: en-GB In-Reply-To: <20260929-claude-fixes-v12-7-62beb08de207@collabora.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 29/09/2026 04:44, Adrián Larumbe wrote: > Because the device must be in a position to accept jobs between the time > drm_dev_register() is called and autosuspend first kicks in, there's a very > narrow window inbetween during which jobs targeting the tiler buffer > object would time out, since the device's PM status is 'Active', but no MMU > interrupts were enabled at device initialisation time. > > Reviewed-by: Boris Brezillon > Signed-off-by: Adrián Larumbe > Fixes: 73e467f60acd ("drm/panfrost: Consolidate reset handling") Reviewed-by: Steven Price > --- > drivers/gpu/drm/panfrost/panfrost_mmu.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c > index 5c393ed6e310..faa62643caf1 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c > +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c > @@ -336,6 +336,12 @@ void panfrost_mmu_as_put(struct panfrost_device *pfdev, struct panfrost_mmu *mmu > WARN_ON(atomic_read(&mmu->as_count) < 0); > } > > +static void panfrost_mmu_enable_interrupts(struct panfrost_device *pfdev) > +{ > + mmu_write(pfdev, MMU_INT_CLEAR, ~0); > + mmu_write(pfdev, MMU_INT_MASK, ~0); > +} > + > void panfrost_mmu_reset(struct panfrost_device *pfdev) > { > struct panfrost_mmu *mmu, *mmu_tmp; > @@ -355,8 +361,7 @@ void panfrost_mmu_reset(struct panfrost_device *pfdev) > > spin_unlock(&pfdev->as_lock); > > - mmu_write(pfdev, MMU_INT_CLEAR, ~0); > - mmu_write(pfdev, MMU_INT_MASK, ~0); > + panfrost_mmu_enable_interrupts(pfdev); > } > > static size_t get_pgsize(u64 addr, size_t size, size_t *count) > @@ -973,6 +978,8 @@ int panfrost_mmu_init(struct panfrost_device *pfdev) > return err; > } > > + panfrost_mmu_enable_interrupts(pfdev); > + > return 0; > } > >