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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5ebccfb12aesm6940821a12.46.2025.03.24.12.38.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Mar 2025 12:38:35 -0700 (PDT) Message-ID: <9602e069-71c0-4feb-9c36-f1bf01c15a6f@oss.qualcomm.com> Date: Mon, 24 Mar 2025 20:38:30 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 6/6] arm64: dts: qcom: ipq5018: Enable PCIe To: George Moussalem , Dmitry Baryshkov Cc: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nitheesh Sekar , Varadarajan Narayanan , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, 20250317100029.881286-2-quic_varada@quicinc.com, Sricharan Ramabadhran References: <20250321-ipq5018-pcie-v6-0-b7d659a76205@outlook.com> <20250321-ipq5018-pcie-v6-6-b7d659a76205@outlook.com> <5seajsw64e7mber5yga3ezcnvip3e4o2wylg3uhvaiu5pob47i@ea3rnxqrigcx> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=BoydwZX5 c=1 sm=1 tr=0 ts=67e1b4be cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=UqCG9HQmAAAA:8 a=EUspDBNiAAAA:8 a=DTJ1r2SVFqceE989MfgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: xnhpYt1S239rri3xTa5LD0g0i1Re7C7T X-Proofpoint-ORIG-GUID: xnhpYt1S239rri3xTa5LD0g0i1Re7C7T X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-24_06,2025-03-21_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxscore=0 spamscore=0 adultscore=0 bulkscore=0 clxscore=1015 malwarescore=0 impostorscore=0 priorityscore=1501 mlxlogscore=587 lowpriorityscore=0 suspectscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503240140 On 3/24/25 9:06 AM, George Moussalem wrote: > > > On 3/21/25 18:13, Dmitry Baryshkov wrote: >> On Fri, Mar 21, 2025 at 04:14:44PM +0400, George Moussalem via B4 Relay wrote: >>> From: Nitheesh Sekar >>> >>> Enable the PCIe controller and PHY nodes for RDP 432-c2. >>> >>> Signed-off-by: Nitheesh Sekar >>> Signed-off-by: Sricharan Ramabadhran >>> Signed-off-by: George Moussalem >>> --- >>>   arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 40 ++++++++++++++++++++++++++ >>>   1 file changed, 40 insertions(+) >> >> Reviewed-by: Dmitry Baryshkov >> >> Minor question below. >> >>> + >>> +&pcie0_phy { >>> +    status = "okay"; >> >> If you have schematics, are you sure that there are no supplies for the >> PCIe PHY / PCIe PLLs on this board? > > I don't have the schematics, but none of the boards I've personally tested (mostly Linksys devices) require any supply. I've also checked the downstream board files documented on codelinaro for ipq5018, and none mention a supply. It looks like on the reference board it's connected to an essentially always-on supply, I'd expect that to be the case on yours as well Konrad