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Mon, 01 Sep 2025 11:32:58 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 581BWv2X028131 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 1 Sep 2025 11:32:57 GMT Received: from [10.204.100.211] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.24; Mon, 1 Sep 2025 04:32:51 -0700 Message-ID: <961c54b2-3335-5fe2-f149-9c89a91d030d@quicinc.com> Date: Mon, 1 Sep 2025 17:02:48 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH 3/5] arm64: dts: qcom: lemans-evk: Extend peripheral and subsystem support Content-Language: en-US To: Dmitry Baryshkov , Wasim Nazir CC: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Richard Cochran , , , , , , , Viken Dadhaniya , Sushrut Shree Trivedi , Nirmesh Kumar Singh , Krishna Kurapati , Mohd Ayaan Anwar , Dikshita Agarwal , Monish Chunara , Vishal Kumar Pal References: <20250826-lemans-evk-bu-v1-0-08016e0d3ce5@oss.qualcomm.com> <20250826-lemans-evk-bu-v1-3-08016e0d3ce5@oss.qualcomm.com> From: Vikash Garodia In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: cjNiJyjpakaQNwQXA5N5buEVyjiDk1wk X-Proofpoint-GUID: cjNiJyjpakaQNwQXA5N5buEVyjiDk1wk X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODMwMDAyMCBTYWx0ZWRfX7d0MmbWQ1giu sGWK8GiHOsClDZdd9ZGC3vVIS8cVMX99vHwKM3bTqBLfmYWfOe1RDPwZsS+HrW7mlm24btQghpf cy+Gk92kBlK8TzIg8oihPZw5FRVzfT/DGxEj8e56c0999S2nPa8eefFlunhUII2vmNLVKW1P8Ns bzRm6owpP4o2pM1xwAEJ/+P+pXOjpCzTZTK+mbVRQwfmTYqJBX2nnICrNj9PcD2rkPAJT/C5VZt XCxUfHZv7Azxah9pvzRFAIvWsw9xmJSEIlEdtuj2VqOuFsPhZbcXiCww8bpg+bBaVTls3+dGKu6 r20j5irblexX97TkXwnITNbthsUnQuNURQQNmuwCM4ljWBT0kI3qY72pB/R6wg6AJAAoDUtK74g WL9NGfrM X-Authority-Analysis: v=2.4 cv=VNndn8PX c=1 sm=1 tr=0 ts=68b5846a cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=iTsxKKdsydDJoPdPDDIA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-01_05,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 impostorscore=0 malwarescore=0 bulkscore=0 clxscore=1011 adultscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508300020 On 8/27/2025 7:05 AM, Dmitry Baryshkov wrote: > On Tue, Aug 26, 2025 at 11:51:02PM +0530, Wasim Nazir wrote: >> Enhance the Qualcomm Lemans EVK board file to support essential >> peripherals and improve overall hardware capabilities, as >> outlined below: >> - Enable GPI (Generic Peripheral Interface) DMA-0/1/2 and QUPv3-0/2 >> controllers to facilitate DMA and peripheral communication. >> - Add support for PCIe-0/1, including required regulators and PHYs, >> to enable high-speed external device connectivity. >> - Integrate the TCA9534 I/O expander via I2C to provide 8 additional >> GPIO lines for extended I/O functionality. >> - Enable the USB0 controller in device mode to support USB peripheral >> operations. >> - Activate remoteproc subsystems for supported DSPs such as Audio DSP, >> Compute DSP-0/1 and Generic DSP-0/1, along with their corresponding >> firmware. >> - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet >> and other consumers. >> - Enable the QCA8081 2.5G Ethernet PHY on port-0 and expose the >> Ethernet MAC address via nvmem for network configuration. >> It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. >> - Add support for the Iris video decoder, including the required >> firmware, to enable video decoding capabilities. >> - Enable SD-card slot on SDHC. >> >> Co-developed-by: Viken Dadhaniya >> Signed-off-by: Viken Dadhaniya >> Co-developed-by: Sushrut Shree Trivedi >> Signed-off-by: Sushrut Shree Trivedi >> Co-developed-by: Nirmesh Kumar Singh >> Signed-off-by: Nirmesh Kumar Singh >> Co-developed-by: Krishna Kurapati >> Signed-off-by: Krishna Kurapati >> Co-developed-by: Mohd Ayaan Anwar >> Signed-off-by: Mohd Ayaan Anwar >> Co-developed-by: Dikshita Agarwal >> Signed-off-by: Dikshita Agarwal >> Co-developed-by: Monish Chunara >> Signed-off-by: Monish Chunara >> Co-developed-by: Vishal Kumar Pal >> Signed-off-by: Vishal Kumar Pal >> Signed-off-by: Wasim Nazir >> --- >> arch/arm64/boot/dts/qcom/lemans-evk.dts | 387 ++++++++++++++++++++++++++++++++ >> 1 file changed, 387 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts >> index 9e415012140b..642b66c4ad1e 100644 >> --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts >> +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts >> @@ -16,7 +16,10 @@ / { >> compatible = "qcom,lemans-evk", "qcom,qcs9100", "qcom,sa8775p"; >> >> aliases { >> + ethernet0 = ðernet0; >> + mmc1 = &sdhc; >> serial0 = &uart10; >> + serial1 = &uart17; >> }; >> >> chosen { >> @@ -46,6 +49,30 @@ edp1_connector_in: endpoint { >> }; >> }; >> }; >> + >> + vmmc_sdc: regulator-vmmc-sdc { >> + compatible = "regulator-fixed"; >> + regulator-name = "vmmc_sdc"; > > Non-switchable, always enabled? > >> + >> + regulator-min-microvolt = <2950000>; >> + regulator-max-microvolt = <2950000>; >> + }; >> + >> + vreg_sdc: regulator-vreg-sdc { >> + compatible = "regulator-gpio"; >> + >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <2950000>; >> + regulator-name = "vreg_sdc"; >> + regulator-type = "voltage"; > > This one also can not be disabled? > >> + >> + startup-delay-us = <100>; >> + >> + gpios = <&expander1 7 GPIO_ACTIVE_HIGH>; >> + >> + states = <1800000 0x1 >> + 2950000 0x0>; >> + }; >> }; >> >> &apps_rsc { >> @@ -277,6 +304,161 @@ vreg_l8e: ldo8 { >> }; >> }; >> >> +ðernet0 { >> + phy-handle = <&hsgmii_phy0>; >> + phy-mode = "2500base-x"; >> + >> + pinctrl-0 = <ðernet0_default>; >> + pinctrl-names = "default"; >> + >> + snps,mtl-rx-config = <&mtl_rx_setup>; >> + snps,mtl-tx-config = <&mtl_tx_setup>; >> + snps,ps-speed = <1000>; >> + >> + nvmem-cells = <&mac_addr0>; >> + nvmem-cell-names = "mac-address"; >> + >> + status = "okay"; >> + >> + mdio { >> + compatible = "snps,dwmac-mdio"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + hsgmii_phy0: ethernet-phy@1c { >> + compatible = "ethernet-phy-id004d.d101"; >> + reg = <0x1c>; >> + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; >> + reset-assert-us = <11000>; >> + reset-deassert-us = <70000>; >> + }; >> + }; >> + >> + mtl_rx_setup: rx-queues-config { >> + snps,rx-queues-to-use = <4>; >> + snps,rx-sched-sp; >> + >> + queue0 { >> + snps,dcb-algorithm; >> + snps,map-to-dma-channel = <0x0>; >> + snps,route-up; >> + snps,priority = <0x1>; >> + }; >> + >> + queue1 { >> + snps,dcb-algorithm; >> + snps,map-to-dma-channel = <0x1>; >> + snps,route-ptp; >> + }; >> + >> + queue2 { >> + snps,avb-algorithm; >> + snps,map-to-dma-channel = <0x2>; >> + snps,route-avcp; >> + }; >> + >> + queue3 { >> + snps,avb-algorithm; >> + snps,map-to-dma-channel = <0x3>; >> + snps,priority = <0xc>; >> + }; >> + }; >> + >> + mtl_tx_setup: tx-queues-config { >> + snps,tx-queues-to-use = <4>; >> + >> + queue0 { >> + snps,dcb-algorithm; >> + }; >> + >> + queue1 { >> + snps,dcb-algorithm; >> + }; >> + >> + queue2 { >> + snps,avb-algorithm; >> + snps,send_slope = <0x1000>; >> + snps,idle_slope = <0x1000>; >> + snps,high_credit = <0x3e800>; >> + snps,low_credit = <0xffc18000>; >> + }; >> + >> + queue3 { >> + snps,avb-algorithm; >> + snps,send_slope = <0x1000>; >> + snps,idle_slope = <0x1000>; >> + snps,high_credit = <0x3e800>; >> + snps,low_credit = <0xffc18000>; >> + }; >> + }; >> +}; >> + >> +&gpi_dma0 { >> + status = "okay"; >> +}; >> + >> +&gpi_dma1 { >> + status = "okay"; >> +}; >> + >> +&gpi_dma2 { >> + status = "okay"; >> +}; >> + >> +&i2c18 { >> + status = "okay"; >> + >> + expander0: pca953x@38 { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x38>; >> + }; >> + >> + expander1: pca953x@39 { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x39>; >> + }; >> + >> + expander2: pca953x@3a { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x3a>; >> + }; >> + >> + expander3: pca953x@3b { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x3b>; >> + }; >> + >> + eeprom@50 { >> + compatible = "atmel,24c256"; >> + reg = <0x50>; >> + pagesize = <64>; >> + >> + nvmem-layout { >> + compatible = "fixed-layout"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + >> + mac_addr0: mac-addr@0 { >> + reg = <0x0 0x6>; >> + }; >> + }; >> + }; >> +}; >> + >> +&iris { >> + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; > > Should it be just _s6.mbn or _s6_16mb.mbn? _s6_16mb.mbn > >> + >> + status = "okay"; >> +}; >> + >> &mdss0 { >> status = "okay"; >> }; >> @@ -323,14 +505,196 @@ &mdss0_dp1_phy { >> status = "okay"; >> }; >> >> +&pcie0 { >> + perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; >> + wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; > > I think Mani has been asking lately to define these GPIOs inside the > port rather than in the host controller. > >> + >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pcie0_default_state>; >> + >> + status = "okay"; >> +}; >> + > > [...] > >> @@ -356,6 +720,29 @@ &ufs_mem_phy { >> status = "okay"; >> }; >> >> +&usb_0 { >> + status = "okay"; >> +}; >> + >> +&usb_0_dwc3 { >> + dr_mode = "peripheral"; > > Is it actually peripheral-only? > >> +}; >> + >