From: Varadarajan Narayanan <quic_varada@quicinc.com>
To: <agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<rafael@kernel.org>, <viresh.kumar@linaro.org>,
<ilia.lin@kernel.org>, <sivaprak@codeaurora.org>,
<quic_kathirav@quicinc.com>, <linux-arm-msm@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-pm@vger.kernel.org>
Cc: Varadarajan Narayanan <quic_varada@quicinc.com>,
Praveenkumar I <ipkumar@codeaurora.org>
Subject: [PATCH v6 2/2] cpufreq: qti: Introduce cpufreq for ipq95xx
Date: Tue, 31 Oct 2023 12:41:39 +0530 [thread overview]
Message-ID: <962f5b1f1eb34b3fa21cd063570eb06b93b2c7d2.1698735972.git.quic_varada@quicinc.com> (raw)
In-Reply-To: <cover.1698735972.git.quic_varada@quicinc.com>
IPQ95xx SoCs have different OPPs available for the CPU based on
the SoC variant. This can be determined from an eFuse register
present in the silicon.
Added support for ipq95xx on nvmem driver which helps to
determine OPPs at runtime based on the eFuse register which
has the CPU frequency limits. opp-supported-hw dt binding
can be used to indicate the available OPPs for each limit.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Praveenkumar I <ipkumar@codeaurora.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
v6: Rebase to top of tree
v5: Merge IPQ95xx with APQ8096 case
v2: Simplify bin selection by tweaking the order in dts
---
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
drivers/cpufreq/qcom-cpufreq-nvmem.c | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 53da255..bd1e135 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -184,6 +184,7 @@ static const struct of_device_id blocklist[] __initconst = {
{ .compatible = "qcom,ipq6018", },
{ .compatible = "qcom,ipq8064", },
{ .compatible = "qcom,ipq8074", },
+ { .compatible = "qcom,ipq9574", },
{ .compatible = "qcom,apq8064", },
{ .compatible = "qcom,msm8974", },
{ .compatible = "qcom,msm8960", },
diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
index 4f7af70..6355a39 100644
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -188,6 +188,11 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
case QCOM_ID_IPQ5312:
case QCOM_ID_IPQ5302:
case QCOM_ID_IPQ5300:
+ case QCOM_ID_IPQ9514:
+ case QCOM_ID_IPQ9550:
+ case QCOM_ID_IPQ9554:
+ case QCOM_ID_IPQ9570:
+ case QCOM_ID_IPQ9574:
drv->versions = 1 << (unsigned int)(*speedbin);
break;
case QCOM_ID_MSM8996SG:
@@ -551,6 +556,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
{ .compatible = "qcom,ipq8064", .data = &match_data_ipq8064 },
{ .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },
{ .compatible = "qcom,apq8064", .data = &match_data_krait },
+ { .compatible = "qcom,ipq9574", .data = &match_data_kryo },
{ .compatible = "qcom,msm8974", .data = &match_data_krait },
{ .compatible = "qcom,msm8960", .data = &match_data_krait },
{},
--
2.7.4
next prev parent reply other threads:[~2023-10-31 7:13 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 7:11 [PATCH v6 0/2] Enable cpufreq for IPQ5332 & IPQ9574 Varadarajan Narayanan
2023-10-31 7:11 ` [PATCH v6 1/2] cpufreq: qti: Enable cpufreq for ipq53xx Varadarajan Narayanan
2023-10-31 7:11 ` Varadarajan Narayanan [this message]
2023-10-31 8:44 ` [PATCH v6 0/2] Enable cpufreq for IPQ5332 & IPQ9574 Viresh Kumar
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