From: Heiko Stuebner <heiko@sntech.de>
To: Sandy Huang <hjc@rock-chips.com>,
Andy Yan <andy.yan@rock-chips.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Chaoyi Chen <kernel@airkyi.com>
Cc: dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
Chaoyi Chen <chaoyi.chen@rock-chips.com>
Subject: Re: [PATCH v4 1/3] drm/rockchip: dsi: Add maximum per lane bit rate calculation
Date: Sat, 12 Sep 2026 14:32:56 +0200 [thread overview]
Message-ID: <9674763.CDJkKcVGEf@phil> (raw)
In-Reply-To: <20260812073002.328-2-kernel@airkyi.com>
Am Mittwoch, 12. August 2026, 09:30:00 Mitteleuropäische Sommerzeit schrieb Chaoyi Chen:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>
> Different chips have varying support for the maximum bit rate per lane.
>
> Add calculation for the maximum per lane bit rate for various chip
> platforms.
>
> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
[...]
> @@ -573,6 +574,7 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, const struct drm_display_mode *mode,
> unsigned long _fbdiv, best_fbdiv;
> unsigned long min_delta = ULONG_MAX;
>
> + max_mbps = dsi->cdata->max_bit_rate_per_lane / USEC_PER_SEC;
As the value is called max_bit_rate_per_lane, I guess Sashiko
is correct in that the max_mbps check should use "<=" ?
Heiko
next prev parent reply other threads:[~2026-09-12 12:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-12 7:29 [PATCH v4 0/3] DSI Controller improvements for Rockchip platforms Chaoyi Chen
2026-08-12 7:30 ` [PATCH v4 1/3] drm/rockchip: dsi: Add maximum per lane bit rate calculation Chaoyi Chen
2026-09-12 12:32 ` Heiko Stuebner [this message]
2026-08-12 7:30 ` [PATCH v4 2/3] drm/rockchip: dsi: Add dphy_get_timing support for multiple PHY types Chaoyi Chen
2026-08-12 7:30 ` [PATCH v4 3/3] drm/rockchip: dsi: Relax the lane rate margin requirements Chaoyi Chen
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