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Wed, 18 Dec 2024 11:22:29 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BIBMSF9028696 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 18 Dec 2024 11:22:28 GMT Received: from [10.152.195.140] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 18 Dec 2024 03:22:22 -0800 Message-ID: <96db4471-0dfe-4969-a916-405105a663ae@quicinc.com> Date: Wed, 18 Dec 2024 16:52:19 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 3/7] thermal/drivers/tsens: Add TSENS enable and calibration support for V2 To: Christophe JAILLET CC: , , , , , , , , , , , , , , , , , References: <20241125050728.3699241-1-quic_mmanikan@quicinc.com> <20241125050728.3699241-4-quic_mmanikan@quicinc.com> Content-Language: en-US From: Manikanta Mylavarapu In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 2a4ucRb0vJ6CtipC5Qo_yVMXSZwU4iWT X-Proofpoint-GUID: 2a4ucRb0vJ6CtipC5Qo_yVMXSZwU4iWT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 suspectscore=0 clxscore=1011 lowpriorityscore=0 adultscore=0 mlxscore=0 priorityscore=1501 mlxlogscore=999 spamscore=0 bulkscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412180092 On 12/14/2024 12:32 AM, Christophe JAILLET wrote: > Le 25/11/2024 à 06:07, Manikanta Mylavarapu a écrit : >> From: Praveenkumar I >> >> SoCs without RPM need to enable sensors and calibrate them from the kernel. >> The IPQ5332 and IPQ5424 use the tsens v2.3.3 IP and do not have RPM. >> Therefore, add a new calibration function for V2, as the tsens.c calib >> function only supports V1. Also add new feature_config, ops and data for >> IPQ5332, IPQ5424. >> >> Although the TSENS IP supports 16 sensors, not all are used. The hw_id >> is used to enable the relevant sensors. > > ... > >> diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c >> index 0cb7301eca6e..836155fa9ab2 100644 >> --- a/drivers/thermal/qcom/tsens-v2.c >> +++ b/drivers/thermal/qcom/tsens-v2.c >> @@ -4,13 +4,32 @@ >>    * Copyright (c) 2018, Linaro Limited >>    */ >>   +#include >>   #include >>   #include >> +#include > > If moved one line above, alphabetical order would be kept. > Sure, i will update in the next version. >>   #include "tsens.h" >>     /* ----- SROT ------ */ >>   #define SROT_HW_VER_OFF    0x0000 > > ... > >> +static const struct tsens_ops ops_ipq5332 = { >> +    .init        = init_tsens_v2_no_rpm, >> +    .get_temp    = get_temp_tsens_valid, >> +    .calibrate    = tsens_v2_calibration, >> +}; >> + >> +struct tsens_plat_data data_ipq5332 = { > > This could easily be made as const. > Sure, i will update in the next version. >> +    .num_sensors    = 5, >> +    .ops        = &ops_ipq5332, >> +    .hw_ids        = (unsigned int []){11, 12, 13, 14, 15}, >> +    .feat        = &ipq5332_feat, >> +    .fields        = tsens_v2_regfields, >> +}; >> + >> +struct tsens_plat_data data_ipq5424 = { > > This could easily be made as const. > Sure, i will update in the next version. Thanks & Regards, Manikanta. >> +    .num_sensors    = 7, >> +    .ops        = &ops_ipq5332, >> +    .hw_ids        = (unsigned int []){9, 10, 11, 12, 13, 14, 15}, >> +    .feat        = &ipq5332_feat, >> +    .fields        = tsens_v2_regfields, >> +}; > > ... > > CJ