Re: [PATCH 2/3] drivers: gpio: siul2-s32g2: add NXP S32G2/S32G3 SoCs support

[Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>]

Hi Krzysztof,

On 26/08/2024 12:10, Krzysztof Kozlowski wrote:
> On 26/08/2024 10:42, Andrei Stefanescu wrote:

Thank you for the quick review!

>> +	raw_spin_lock_init(&gpio_dev->lock);
> 
> Why do you use raw spin? Are you sure you need it (some people just
> replace it thinking this will help them in PREEMPT_RT without actually
> thinking if it is needed). IOW, do you have here irqchip anywhere?

I don't have an irqchip in this current patch series. There are, however,
other patches which add support for interrupts and implementations for
power management callbacks. I thought it would be easier for review if I
sent those after the current series gets merged.

>> +
>> +static const struct of_device_id siul2_gpio_dt_ids[] = {
>> +	{ .compatible = "nxp,s32g2-siul2-gpio", .data = &s32g2_device_data },
> 
> Why do you have match data? There are no other variants.


We do have another match data in our downstream version. Could I keep it
here or should I remove it?


I will fix the other comments in v2.

Best regards,
Andrei