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[87.147.87.116]) by smtp.gmail.com with ESMTPSA id wc6-20020a170907124600b006fec8e8eff6sm1217645ejb.176.2022.05.22.12.49.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 May 2022 12:49:31 -0700 (PDT) Date: Sun, 22 May 2022 21:49:28 +0200 From: Philipp Hortmann To: Forest Bond , Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 10/11] staging: vt6655: Add missing BE support on 2x iowrite32 Message-ID: <974ef7a9244e7caeafd8c176c7b53a6de3c20219.1653203927.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add missing big-endian support when using two times iowrite32 to write 64 Bit. Signed-off-by: Philipp Hortmann --- Code for testing: dev_info(&priv->pcid->dev, "CARDbUpdateTSF little endian before con.: 0x%016llx", qwTSFOffset); qwTSFOffset = le64_to_cpu(qwTSFOffset); dev_info(&priv->pcid->dev, "CARDbUpdateTSF little endian after con. : 0x%016llx", qwTSFOffset); dev_info(&priv->pcid->dev, "CARDbUpdateTSF big endian: 0x%016llx", be64_to_cpu(qwTSFOffset)); Log vt6655 0000:01:05.0: CARDbUpdateTSF little endian before con.: 0xff ff ff ff fd b7 d5 fc vt6655 0000:01:05.0: CARDbUpdateTSF little endian after con. : 0xff ff ff ff fd b7 d5 fc vt6655 0000:01:05.0: CARDbUpdateTSF big endian: 0xfc d5 b7 fd ff ff ff ff --- drivers/staging/vt6655/card.c | 4 ++++ drivers/staging/vt6655/device_main.c | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c index 7a4a8b3f164e..abc74a5633c7 100644 --- a/drivers/staging/vt6655/card.c +++ b/drivers/staging/vt6655/card.c @@ -293,6 +293,7 @@ bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate, qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp, local_tsf); /* adjust TSF, HW's TSF add TSF Offset reg */ + qwTSFOffset = le64_to_cpu(qwTSFOffset); iowrite32((u32)qwTSFOffset, priv->port_offset + MAC_REG_TSFOFST); iowrite32((u32)(qwTSFOffset >> 32), priv->port_offset + MAC_REG_TSFOFST + 4); MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, @@ -327,6 +328,7 @@ bool CARDbSetBeaconPeriod(struct vnt_private *priv, iowrite16(wBeaconInterval, priv->port_offset + MAC_REG_BI); priv->wBeaconInterval = wBeaconInterval; /* Set NextTBTT */ + qwNextTBTT = le64_to_cpu(qwNextTBTT); iowrite32((u32)qwNextTBTT, priv->port_offset + MAC_REG_NEXTTBTT); iowrite32((u32)(qwNextTBTT >> 32), priv->port_offset + MAC_REG_NEXTTBTT + 4); MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); @@ -795,6 +797,7 @@ void CARDvSetFirstNextTBTT(struct vnt_private *priv, qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval); /* Set NextTBTT */ + qwNextTBTT = le64_to_cpu(qwNextTBTT); iowrite32((u32)qwNextTBTT, iobase + MAC_REG_NEXTTBTT); iowrite32((u32)(qwNextTBTT >> 32), iobase + MAC_REG_NEXTTBTT + 4); MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); @@ -821,6 +824,7 @@ void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF, qwTSF = CARDqGetNextTBTT(qwTSF, wBeaconInterval); /* Set NextTBTT */ + qwTSF = le64_to_cpu(qwTSF); iowrite32((u32)qwTSF, iobase + MAC_REG_NEXTTBTT); iowrite32((u32)(qwTSF >> 32), iobase + MAC_REG_NEXTTBTT + 4); MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c index c32c0328b602..204994692c90 100644 --- a/drivers/staging/vt6655/device_main.c +++ b/drivers/staging/vt6655/device_main.c @@ -1529,6 +1529,7 @@ static void vnt_configure(struct ieee80211_hw *hw, } else { MACvSelectPage1(priv->port_offset); + multicast = le64_to_cpu(multicast); iowrite32((u32)multicast, priv->port_offset + MAC_REG_MAR0); iowrite32((u32)(multicast >> 32), priv->port_offset + MAC_REG_MAR0 + 4); -- 2.25.1