From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752634AbdGYPkP (ORCPT ); Tue, 25 Jul 2017 11:40:15 -0400 Received: from esa6.microchip.iphmx.com ([216.71.154.253]:37595 "EHLO esa6.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752144AbdGYPkN (ORCPT ); Tue, 25 Jul 2017 11:40:13 -0400 X-IronPort-AV: E=Sophos;i="5.40,411,1496127600"; d="scan'208";a="2526091" Subject: Re: [PATCH v4 8/9] ASoC: atmel-classd: remove aclk clock To: Quentin Schulz , , , , , , , , , , , CC: , , , , , , References: <645aa35fec4a2384ca2f3039615ee6598602f9e2.1500968090.git-series.quentin.schulz@free-electrons.com> From: Nicolas Ferre Organization: microchip Message-ID: <97863fa5-06aa-598b-050f-4454c720420a@microchip.com> Date: Tue, 25 Jul 2017 17:40:14 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <645aa35fec4a2384ca2f3039615ee6598602f9e2.1500968090.git-series.quentin.schulz@free-electrons.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25/07/2017 at 09:37, Quentin Schulz wrote: > Since gclk (generated-clk) is now able to determine the rate of the > audio_pll, there is no need for classd to have a direct phandle to the > audio_pll while already having a phandle to gclk. > > Thus, remove all mentions to aclk in classd driver and update macros and > variable names. > > Signed-off-by: Quentin Schulz > Acked-by: Mark Brown Acked-by: Nicolas Ferre > --- > sound/soc/atmel/atmel-classd.c | 47 ++++++++++------------------------- > 1 file changed, 14 insertions(+), 33 deletions(-) > > diff --git a/sound/soc/atmel/atmel-classd.c b/sound/soc/atmel/atmel-classd.c > index b7ef8c5..be6b775 100644 > --- a/sound/soc/atmel/atmel-classd.c > +++ b/sound/soc/atmel/atmel-classd.c > @@ -32,7 +32,6 @@ struct atmel_classd { > struct regmap *regmap; > struct clk *pclk; > struct clk *gclk; > - struct clk *aclk; > int irq; > const struct atmel_classd_pdata *pdata; > }; > @@ -330,11 +329,6 @@ static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream, > { > struct snd_soc_pcm_runtime *rtd = substream->private_data; > struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); > - int ret; > - > - ret = clk_prepare_enable(dd->aclk); > - if (ret) > - return ret; > > return clk_prepare_enable(dd->gclk); > } > @@ -357,31 +351,31 @@ static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai, > return 0; > } > > -#define CLASSD_ACLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) > -#define CLASSD_ACLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) > +#define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) > +#define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) > > static struct { > int rate; > int sample_rate; > int dsp_clk; > - unsigned long aclk_rate; > + unsigned long gclk_rate; > } const sample_rates[] = { > { 8000, CLASSD_INTPMR_FRAME_8K, > - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, > + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, > { 16000, CLASSD_INTPMR_FRAME_16K, > - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, > + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, > { 32000, CLASSD_INTPMR_FRAME_32K, > - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, > + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, > { 48000, CLASSD_INTPMR_FRAME_48K, > - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, > + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, > { 96000, CLASSD_INTPMR_FRAME_96K, > - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, > + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, > { 22050, CLASSD_INTPMR_FRAME_22K, > - CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, > + CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, > { 44100, CLASSD_INTPMR_FRAME_44K, > - CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, > + CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, > { 88200, CLASSD_INTPMR_FRAME_88K, > - CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, > + CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, > }; > > static int > @@ -410,13 +404,12 @@ atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, > } > > dev_dbg(codec->dev, > - "Selected SAMPLE_RATE of %dHz, ACLK_RATE of %ldHz\n", > - sample_rates[best].rate, sample_rates[best].aclk_rate); > + "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n", > + sample_rates[best].rate, sample_rates[best].gclk_rate); > > clk_disable_unprepare(dd->gclk); > - clk_disable_unprepare(dd->aclk); > > - ret = clk_set_rate(dd->aclk, sample_rates[best].aclk_rate); > + ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); > if (ret) > return ret; > > @@ -426,10 +419,6 @@ atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, > > snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val); > > - ret = clk_prepare_enable(dd->aclk); > - if (ret) > - return ret; > - > return clk_prepare_enable(dd->gclk); > } > > @@ -441,7 +430,6 @@ atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream, > struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); > > clk_disable_unprepare(dd->gclk); > - clk_disable_unprepare(dd->aclk); > } > > static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream, > @@ -596,13 +584,6 @@ static int atmel_classd_probe(struct platform_device *pdev) > return ret; > } > > - dd->aclk = devm_clk_get(dev, "aclk"); > - if (IS_ERR(dd->aclk)) { > - ret = PTR_ERR(dd->aclk); > - dev_err(dev, "failed to get audio clock: %d\n", ret); > - return ret; > - } > - > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > io_base = devm_ioremap_resource(dev, res); > if (IS_ERR(io_base)) { > -- Nicolas Ferre