From: Rohit Agarwal <quic_rohiagar@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@linaro.org>, <agross@kernel.org>,
<andersson@kernel.org>, <lee@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <mani@kernel.org>,
<lpieralisi@kernel.org>, <kw@linux.com>, <bhelgaas@google.com>,
<manivannan.sadhasivam@linaro.org>
Cc: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>
Subject: Re: [PATCH v2 5/6] ARM: dts: qcom: sdx65-mtp: Enable PCIe PHY
Date: Wed, 8 Mar 2023 18:40:33 +0530 [thread overview]
Message-ID: <97a12bba-27e8-2cab-a211-5ed9b4ce49b6@quicinc.com> (raw)
In-Reply-To: <34e0dc8a-2879-b1c2-8567-8ac0cf0ced80@linaro.org>
On 3/8/2023 6:08 PM, Konrad Dybcio wrote:
>
> On 8.03.2023 13:19, Rohit Agarwal wrote:
>> Enable PCIe PHY on SDX65 MTP for PCIe EP. While at it,
>> updating status as last property for each node.
>>
>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>> ---
>> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 20 +++++++++++++++-----
>> 1 file changed, 15 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
>> index ed98c83..facb8e2 100644
>> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
>> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
>> @@ -245,13 +245,18 @@
>> status = "okay";
>> };
>>
>> -&qpic_bam {
>> +&pcie_phy {
>> + vdda-phy-supply = <&vreg_l1b_1p2>;
>> + vdda-pll-supply = <&vreg_l4b_0p88>;
>> +
>> status = "okay";
>> };
>>
>> -&qpic_nand {
>> +&qpic_bam {
>> status = "okay";
>> +};
>>
>> +&qpic_nand {
>> nand@0 {
>> reg = <0>;
>>
>> @@ -262,11 +267,14 @@
>> secure-regions = /bits/ 64 <0x500000 0x500000
>> 0xa00000 0xb00000>;
>> };
>> +
>> + status = "okay";
> Did you compiletest this?
So Sorry, Missed some of the patches for compiletest.
Will update immediately.
Thanks,
Rohit.
>
> Konrad
>> };
>>
>> &remoteproc_mpss {
>> - status = "okay";
>> memory-region = <&mpss_adsp_mem>;
>> +
>> + status = "okay";
>> };
>>
>> &usb {
>> @@ -278,14 +286,16 @@
>> };
>>
>> &usb_hsphy {
>> - status = "okay";
>> vdda-pll-supply = <&vreg_l4b_0p88>;
>> vdda33-supply = <&vreg_l10b_3p08>;
>> vdda18-supply = <&vreg_l5b_1p8>;
>> +
>> + status = "okay";
>> };
>>
>> &usb_qmpphy {
>> - status = "okay";
>> vdda-phy-supply = <&vreg_l4b_0p88>;
>> vdda-pll-supply = <&vreg_l1b_1p2>;
>> +
>> + status = "okay";
>> };
next prev parent reply other threads:[~2023-03-08 13:15 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-08 12:19 [PATCH v2 0/6] Add PCIe EP support for SDX65 Rohit Agarwal
2023-03-08 12:19 ` [PATCH v2 1/6] dt-bindings: mfd: qcom,tcsr: Add compatible for sdx65 Rohit Agarwal
2023-03-08 13:00 ` Lee Jones
2023-03-08 12:19 ` [PATCH v2 2/6] dt-bindings: PCI: qcom: Add SDX65 SoC Rohit Agarwal
2023-03-08 12:19 ` [PATCH v2 3/6] ARM: dts: qcom: sdx65: Add support for PCIe PHY Rohit Agarwal
2023-03-08 12:35 ` Konrad Dybcio
2023-03-11 4:40 ` kernel test robot
2023-03-08 12:19 ` [PATCH v2 4/6] ARM: dts: qcom: sdx65: Add support for PCIe EP Rohit Agarwal
2023-03-11 13:51 ` Dmitry Baryshkov
2023-03-08 12:19 ` [PATCH v2 5/6] ARM: dts: qcom: sdx65-mtp: Enable PCIe PHY Rohit Agarwal
2023-03-08 12:38 ` Konrad Dybcio
2023-03-08 13:10 ` Rohit Agarwal [this message]
2023-03-08 12:19 ` [PATCH v2 6/6] ARM: dts: qcom: sdx65-mtp: Enable PCIe EP Rohit Agarwal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=97a12bba-27e8-2cab-a211-5ed9b4ce49b6@quicinc.com \
--to=quic_rohiagar@quicinc.com \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=lee@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®