Re: [PATCH v2 5/6] dt-bindings: iio: adc: adi,ad7380: add spi-buses property

[David Lechner <dlechner@baylibre.com>]

On 11/18/25 9:59 AM, Rob Herring wrote:
> On Fri, Nov 07, 2025 at 02:52:51PM -0600, David Lechner wrote:
>> Add spi-buses property to describe how many SDO lines are wired up on
>> the ADC. These chips are simultaneous sampling ADCs and have one SDO
>> line per channel, either 2 or 4 total depending on the part number.
>>
>> Signed-off-by: David Lechner <dlechner@baylibre.com>
>> ---
>>  .../devicetree/bindings/iio/adc/adi,ad7380.yaml    | 22 ++++++++++++++++++++++
>>  1 file changed, 22 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
>> index b91bfb16ed6bc6c605880f81050250d1ed9c307a..9ef46cdb047d45d088e0fbc345f58c5b09083385 100644
>> --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
>> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
>> @@ -62,6 +62,10 @@ properties:
>>    spi-cpol: true
>>    spi-cpha: true
>>  
>> +  spi-data-buses:
>> +    minItems: 1
>> +    maxItems: 4
>> +
> 
> As the property is not required, what's the default?

spi-perepheral-props.yaml defines:

	default: [0]

Do I need to repeat that here?

> 
>>    vcc-supply:
>>      description: A 3V to 3.6V supply that powers the chip.
>>  
>> @@ -245,6 +249,22 @@ allOf:
>>        patternProperties:
>>          "^channel@[0-3]$": false
>>  
>> +  # 2-channel chip can only have up to 2 buses
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          enum:
>> +            - adi,ad7380
>> +            - adi,ad7381
>> +            - adi,ad7386
>> +            - adi,ad7387
>> +            - adi,ad7388
>> +            - adi,ad7389
>> +    then:
>> +      properties:
>> +        spi-data-buses:
>> +          maxItems: 2
>> +
>>  examples:
>>    - |
>>      #include <dt-bindings/interrupt-controller/irq.h>
>> @@ -260,6 +280,7 @@ examples:
>>              spi-cpol;
>>              spi-cpha;
>>              spi-max-frequency = <80000000>;
>> +            spi-data-buses = <0>, <1>;
>>  
>>              interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
>>              interrupt-parent = <&gpio0>;
>> @@ -284,6 +305,7 @@ examples:
>>              spi-cpol;
>>              spi-cpha;
>>              spi-max-frequency = <80000000>;
>> +            spi-data-buses = <0>, <1>, <2>, <3>;
> 
> An example that doesn't look like a 1 to 1 mapping would be better. 
> Otherwise, it still looks to me like you could just define the bus 
> width.

I'm not sure we could do that on this chip since it doesn't have
the possibility of more than one line per channel. I can add a
patch with a binding for a different chip though that can have
such an example.

> 
>>  
>>              interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
>>              interrupt-parent = <&gpio0>;
>>
>> -- 
>> 2.43.0
>>