From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3028AC433EF for ; Fri, 28 Jan 2022 23:53:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344843AbiA1XxZ (ORCPT ); Fri, 28 Jan 2022 18:53:25 -0500 Received: from mga03.intel.com ([134.134.136.65]:11466 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244951AbiA1XxY (ORCPT ); Fri, 28 Jan 2022 18:53:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643414004; x=1674950004; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=nYA95kQjyUG9ZfYCyAL8OLIznlSzVYP7TooUb1ysFxc=; b=PDYrV2Dx/XKRDng0DFxLbQ4KUYOaiVDwrdn+oh7fYJw8d4ptIzvJHAbg nji0HzvS+u/nwS/walu0R1oUS+yzOcEXReXFiHN7Q0aoCsYQJKoiq5h7U Qm7BAlR9d7g/AsiwJwOhMmTo9q5TtxphepEo+ZIzwqVCUgUyBUDGaH3tx ijx6doulHfdwlgJTLRoRCOkGSBnbJimb63xXUuZZ7FQOCDXWUL0gFXm+6 fxKlA+zZWLLcgDnruMKQaJyW80dy2DlZ34YI2tpafvx31+YkK2MvdNOaz 4Wkjoeb1I0RdmHBPkWby2+Ai4zEHFub85fWZF1xg9ZH0MyFbMwHw/fmH6 A==; X-IronPort-AV: E=McAfee;i="6200,9189,10241"; a="247167898" X-IronPort-AV: E=Sophos;i="5.88,325,1635231600"; d="scan'208";a="247167898" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2022 15:53:23 -0800 X-IronPort-AV: E=Sophos;i="5.88,325,1635231600"; d="scan'208";a="697255394" Received: from zhenkuny-mobl2.amr.corp.intel.com (HELO [10.209.84.59]) ([10.209.84.59]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2022 15:53:23 -0800 Message-ID: <97fc1205-4270-1924-d3b3-19708ada648c@intel.com> Date: Fri, 28 Jan 2022 15:53:22 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.2 Subject: Re: [PATCH V8 09/44] x86/pkeys: Enable PKS on cpus which support it Content-Language: en-US To: Ira Weiny Cc: Dave Hansen , "H. Peter Anvin" , Dan Williams , Fenghua Yu , Rick Edgecombe , linux-kernel@vger.kernel.org References: <20220127175505.851391-1-ira.weiny@intel.com> <20220127175505.851391-10-ira.weiny@intel.com> <20220128234103.GL785175@iweiny-DESK2.sc.intel.com> From: Dave Hansen In-Reply-To: <20220128234103.GL785175@iweiny-DESK2.sc.intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/28/22 15:41, Ira Weiny wrote: > On Fri, Jan 28, 2022 at 03:18:29PM -0800, Dave Hansen wrote: >> On 1/27/22 09:54, ira.weiny@intel.com wrote: >>> Initially, pks_setup() initializes the per-cpu MSR with 0 to enable all >>> access on all pkeys. >> >> Why not just make it restrictive to start out? That's what we do for PKU. > > This maintains compatibility with the code prior to this patch. Ie no > restrictions on kernel mappings. But, compatibility with what? At this point, there are no non-pkey-0 kernel mappings. So, PKRS can be set to anything as long as the two low bits are clear.