From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 05B5D320A14 for ; Sat, 25 Jul 2026 09:32:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784971956; cv=none; b=gq0l2aSllPaqNWkATCpKxJ/ImIbWUZlzUnOsxo8nyM7nHU+nTEwVhTwXkbo63ycXPeKtk3+t/Si4xQV+5tA2DSLkBTL1NgpIsj4/zfAp9K5Zx1yoEc344NG3PSI5B0mmUQHXzpsEMzFZz6WlLtWS/YQDOW0F6f5xHUgmmRBXkXo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784971956; c=relaxed/simple; bh=+YHGuOxZe4OSOFwNW1INtr0zw0kVuf02KYjxrNCcfVA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fwF25nhyYiJliQ2mClIfTsCRVQ2gCJRqJsGTQrU/Aq33l2KKEJ6qu/JWPxFn1vXboJFyK8WYo8Sk57LyQVBnZcCJv72tMz/SDzT7Zp0hdHhExd6Y033emSlytcj3qVwfOv7QUSW1r7ro/FENaJfpknynSyuTXcIuka9g4wHEyck= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=IAg2PAtB; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="IAg2PAtB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1784971954; x=1816507954; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+YHGuOxZe4OSOFwNW1INtr0zw0kVuf02KYjxrNCcfVA=; b=IAg2PAtBVGnfnrEBVgQTFlQnXUJUBR+mZy1cJ7RsMjNZz6+SQMb/UlVD l6Vx4EprLF3ChPZmPL7nNz0RLrWzh3wLg+o18Nd3AXy4sJMJCZ/bfvDa9 o0UR/rqStIrdyhfns7csVLjke96BUjKQ57dNv2J/gIdo+65MExSyjRsve 5pva07a/iU/9ZeS5hsjISstAgoJz/0lpDy1lKO3U+a4DxjdlUblihjSv1 BlL2YJ3Ns1uOQDo3QRUqXzidRXLXAheW4JARF986x3IabfapHA8tnFqhg 3Xkn29tgCIjN3GF9xQLLxDK6PJxZTlkIyXskgaDY9XQonFTyB0L27rdlt A==; X-CSE-ConnectionGUID: P4MZjz6JR6WzdKRxw71A5g== X-CSE-MsgGUID: kH12wa6aToKIn/3GwyauIg== X-IronPort-AV: E=McAfee;i="6800,10657,11855"; a="95979015" X-IronPort-AV: E=Sophos;i="6.25,184,1779174000"; d="scan'208";a="95979015" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jul 2026 02:32:32 -0700 X-CSE-ConnectionGUID: qA8KFyJgTvioE36sJT0o6g== X-CSE-MsgGUID: otitHvl9RhGDN8RRaeCuUQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,184,1779174000"; d="scan'208";a="260878609" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by fmviesa004.fm.intel.com with ESMTP; 25 Jul 2026 02:32:29 -0700 From: Chen Yu To: tony.luck@intel.com, reinette.chatre@intel.com Cc: tglx@kernel.org, bp@alien8.de, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, fenghuay@nvidia.com, babu.moger@amd.com, chen.yu@linux.dev, x86@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 2/9] x86/resctrl: Require 64-bit x86 for resctrl support Date: Sat, 25 Jul 2026 17:22:45 +0800 Message-Id: <980c4d9c15862de0b0dbc535b646f6b96ea46abe.1784968626.git.yu.c.chen@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit All known hardware that supports Intel RDT or AMD QoS is 64-bit. Future enhancements like MMIO-based Enhanced RDT (ERDT) monitoring require readq()/writeq() which are only available on 64-bit. There is also no realistic use case for users to build a 32-bit kernel on a server and enable resctrl. Drop 32-bit support by changing the X86_CPU_RESCTRL dependency from X86 to X86_64. Since X86_CPU_RESCTRL now implies X86_64, remove the redundant X86_64 dependency from X86_CPU_RESCTRL_INTEL_AET. Signed-off-by: Chen Yu Tested-by: Hongyu Ning --- v5->v6: Order the tags per Documentation/process/maintainer-tip.rst. --- arch/x86/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index bdad90f210e4..6685e120cff3 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -514,7 +514,7 @@ config X86_MPPARSE config X86_CPU_RESCTRL bool "x86 CPU resource control support" - depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) + depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) depends on MISC_FILESYSTEMS select ARCH_HAS_CPU_RESCTRL select RESCTRL_FS @@ -537,7 +537,7 @@ config X86_CPU_RESCTRL config X86_CPU_RESCTRL_INTEL_AET bool "Intel Application Energy Telemetry" - depends on X86_64 && X86_CPU_RESCTRL && CPU_SUP_INTEL && INTEL_PMT_TELEMETRY=y && INTEL_TPMI=y + depends on X86_CPU_RESCTRL && CPU_SUP_INTEL && INTEL_PMT_TELEMETRY=y && INTEL_TPMI=y help Enable per-RMID telemetry events in resctrl. -- 2.25.1