From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932132AbdCMR0J (ORCPT ); Mon, 13 Mar 2017 13:26:09 -0400 Received: from mail-ve1eur01on0065.outbound.protection.outlook.com ([104.47.1.65]:56655 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753607AbdCMRZ7 (ORCPT ); Mon, 13 Mar 2017 13:25:59 -0400 Authentication-Results: spf=pass (sender IP is 188.184.36.50) smtp.mailfrom=cern.ch; gmail.com; dkim=none (message not signed) header.d=none;gmail.com; dmarc=bestguesspass action=none header.from=cern.ch; Subject: Re: [PATCH] spi: Add spi-bits-per-word binding. To: Mark Brown References: <20170217101151.hyzmz5a4lgdy7p5m> <20170220153512.6563-1-adrian.fiergolski@cern.ch> <20170221190830.xyubgimyc2w5p5v6@sirena.org.uk> CC: , , , , , From: Adrian Fiergolski Organization: CERN Message-ID: <983e943b-30f2-7d80-294a-df29bca11738@cern.ch> Date: Mon, 13 Mar 2017 18:25:53 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <20170221190830.xyubgimyc2w5p5v6@sirena.org.uk> Content-Type: text/plain; charset="windows-1252" X-Originating-IP: [128.141.234.143] X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:188.184.36.50;IPV:NLI;CTRY:CH;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(39840400002)(39450400003)(39850400002)(39410400002)(2980300002)(438002)(199003)(189002)(24454002)(4326008)(86362001)(6246003)(230783001)(38730400002)(54906002)(229853002)(31696002)(110136004)(39060400002)(65956001)(65806001)(305945005)(47776003)(356003)(8676002)(7736002)(8936002)(7636002)(23746002)(66066001)(74482002)(8746002)(6916009)(2950100002)(106466001)(33646002)(50466002)(36756003)(5660300001)(65826007)(64126003)(31686004)(6706004)(2906002)(4001350100001)(83506001)(189998001)(54356999)(76176999)(6116002)(50986999)(3846002)(53546007)(3940600001);DIR:OUT;SFP:1101;SCL:1;SRVR:DBXPR06MB429;H:CERNMX11.cern.ch;FPR:;SPF:Pass;MLV:ovrnspm;A:1;MX:1;PTR:cernmx11.cern.ch;LANG:en; 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Any line of spidev (or device driver in general) is called, if master, setting its bit_per_word_mask, doesn't cover 8 bits per word. Thus, in such a case, any device driver has a possibility to be registered and handle the "limited capabilities of the controller". IMHO, the problem is in the spi core itself. I will try to be more clear. In my case, xilinx_spi_probe function (of spi-xilinx controller) sets bits_per_word_mask of spi_master struct only to 16 bits support. Later, xilinx_spi_probe calls of_register_spi_devices, which calls of_register_spi_devices. The last one allocates an empty spi_device struct and configures different options of the spi_device according to a device tree. bits_per_word are not covered here (why?), thus it is left 0 (value after allocation), which, by convention, means 8 bits support. At the end, the same function (of_register_spi_device) calls spi_add_device which finally calls spi_setup. The last call, according to convention, changes bits_per_word to 8 and calls __spi_validate_bits_per_word which fails, as master doesn't support 8 bit transmission. This fails registration sequence of a device driver. As you see, the device driver doesn't have possibility to modify bits_per_word during the registration process, thus it can't provide support for such limited controllers. Regards, Adrian On 21.02.2017 at 20:08, Mark Brown wrote: > On Mon, Feb 20, 2017 at 04:35:12PM +0100, Adrian Fiergolski wrote: >> If an SPI controller doesn't support 8 bit transfers >> (master->bits_per_word_mask), it will be never registered (tested with >> spidev): >> of_register_spi_device calls spi_add_device which calls spi_setup. The last >> takes as an argument spi_device struct, which, in case of spidev, has >> bits_per_word set to 0. Thus, the spi_setup function will set it to default >> 8. Further, the same function will call __spi_validate_bits_per_word which >> will fail the whole registration for controllers not supporting 8 bit >> transfers (i.e. xilinx-spi). > This doens't make much sense, if a device driver requires a given number > of bits per word forcing a different value via device tree is not going > to result in the driver actually working. If you want to use a device > with a controller with restricted bits per word support you need to > change the device driver to support the limited capabilities of the > controller.