From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17A9C34E75C for ; Thu, 11 Jun 2026 22:35:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781217313; cv=none; b=VK0bDoXxqH48haCp1x1pqv5lAxm2cchNOFQV+qdTWu5dFqROTjPedHd9FCX9l5Qdr2QeR2+NBx0k8/p8Q08+KqdwxmNLTzL2EixtV5i04PMF1OJ2nQTAVHgVR+8LGxXv79iKune+9zbuZj5GSKT0GvWkW1ToEcRyyLi+oT+TpD0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781217313; c=relaxed/simple; bh=cRGHme0tAV6IKFv8HcT+hk3ouzIO7R9gm1Jjz/7RyPw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=r/wzP/h/UfYMGgz3Be6prlDQGd2Z52gy0cchKk44EXgX8ll3/ooImzK/rOFDOKMAvrbcEmVNgUcb+g4+wOOpEiSvOJoM4D1wCpD/6dJnYDJZ98USowu7iHp9jVFW9PmEVwkVRVhTnZOEm3pxhYQ3LzEhF+NnBKDDXLOw8XLimpk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=k52kniZd; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="k52kniZd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 473061F000E9; Thu, 11 Jun 2026 22:35:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781217311; bh=W54prHP8fGytU1rOS8+Hf3AtDU1mG+ds5OTzQlLpjTM=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=k52kniZdWL8UQldjmDCHEjGM3FHMz71eXjKAszKy960u1J3nV5NgKEsgfje41M9bK 8ClaXzadch4CC5Xgbv5PKN+kSjRS3iCIWcxGynb3xd1vYoOknYBAuWgJwhHWGg+ltM nQRpjCJCABcXuAHowippgIYll3CALI4z1i4egD+o0+NN8NphBG7R06OgacmIA0K0uQ gIqR9hSuYEUqR/WUhzJO60KL/FkRe7+LBiQZQI2cFo6dAQkRk6iKghkjAXqd+oF4he Sd0P1WnLXTDB/UQFI2RVjNjWPuhIRWMVTXT3cYBeAj3UnvdhFCBF0H+uzxXhZ7PUAF elv+LRBUt/SCg== Message-ID: <985d6f4a-bc8e-4c41-9d88-e845210d22ed@kernel.org> Date: Thu, 11 Jun 2026 17:35:09 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH resend] arm64: dts: intel: keembay: Always use decimal interrupts Content-Language: en-US To: Geert Uytterhoeven , Arnd Bergmann , Krzysztof Kozlowski , "Paul J . Murphy" Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: From: Dinh Nguyen In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 6/10/26 23:55, Geert Uytterhoeven wrote: > Replace the sole hexadecimal interrupt number by a decimal number, for > consistency with all other interrupt numbers. > > Signed-off-by: Geert Uytterhoeven > --- > arch/arm64/boot/dts/intel/keembay-soc.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/intel/keembay-soc.dtsi b/arch/arm64/boot/dts/intel/keembay-soc.dtsi > index ae00e9e54e82cbb9..b6323ebe7a5f46bd 100644 > --- a/arch/arm64/boot/dts/intel/keembay-soc.dtsi > +++ b/arch/arm64/boot/dts/intel/keembay-soc.dtsi > @@ -71,7 +71,7 @@ timer { > > pmu { > compatible = "arm,cortex-a53-pmu"; > - interrupts = ; > + interrupts = ; > }; > > soc { Applied! Thanks, Dinh