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Sun, 15 Nov 2020 23:07:15 -0800 Envelope-to: git@xilinx.com, michal.simek@xilinx.com, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ulf.hansson@linaro.org, adrian.hunter@intel.com Received: from [172.30.17.110] (port=37044) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1keYba-0005Qq-Uv; Sun, 15 Nov 2020 23:07:15 -0800 Subject: Re: [PATCH 1/2] mmc: sdhci-of-arasan: Use Mask writes for Tap delays To: Manish Narani , , , CC: , , , , Sai Krishna Potthuri References: <1605507327-106818-1-git-send-email-manish.narani@xilinx.com> <1605507327-106818-2-git-send-email-manish.narani@xilinx.com> From: Michal Simek Message-ID: <98b6be8f-48db-5e7f-5fd7-825432235e06@xilinx.com> Date: Mon, 16 Nov 2020 08:07:12 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.3 MIME-Version: 1.0 In-Reply-To: <1605507327-106818-2-git-send-email-manish.narani@xilinx.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: da87ca50-0524-4f0b-51d7-08d889fe4f68 X-MS-TrafficTypeDiagnostic: BL0PR02MB4819: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:4941; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Nov 2020 07:07:41.8221 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: da87ca50-0524-4f0b-51d7-08d889fe4f68 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BL2NAM02FT007.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR02MB4819 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16. 11. 20 7:15, Manish Narani wrote: > Mask the ITAP and OTAP delay bits before updating with the new > tap value for Versal platform. > > Fixes: 1a470721c8f5 ("sdhci: arasan: Add support for Versal Tap Delays") > Signed-off-by: Sai Krishna Potthuri > Signed-off-by: Manish Narani > --- > drivers/mmc/host/sdhci-of-arasan.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > index 100621e55427..3ec5ecad637c 100644 > --- a/drivers/mmc/host/sdhci-of-arasan.c > +++ b/drivers/mmc/host/sdhci-of-arasan.c > @@ -30,7 +30,10 @@ > #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 > > #define SDHCI_ARASAN_ITAPDLY_REGISTER 0xF0F8 > +#define SDHCI_ARASAN_ITAPDLY_SEL_MASK 0xFF > + > #define SDHCI_ARASAN_OTAPDLY_REGISTER 0xF0FC > +#define SDHCI_ARASAN_OTAPDLY_SEL_MASK 0x3F > > #define SDHCI_ARASAN_CQE_BASE_ADDR 0x200 > #define VENDOR_ENHANCED_STROBE BIT(0) > @@ -755,6 +758,7 @@ static int sdhci_versal_sdcardclk_set_phase(struct clk_hw *hw, int degrees) > regval = sdhci_readl(host, SDHCI_ARASAN_OTAPDLY_REGISTER); > regval |= SDHCI_OTAPDLY_ENABLE; > sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER); > + regval &= ~SDHCI_ARASAN_OTAPDLY_SEL_MASK; > regval |= tap_delay; > sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER); > } > @@ -822,6 +826,7 @@ static int sdhci_versal_sampleclk_set_phase(struct clk_hw *hw, int degrees) > sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); > regval |= SDHCI_ITAPDLY_ENABLE; > sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); > + regval &= ~SDHCI_ARASAN_ITAPDLY_SEL_MASK; > regval |= tap_delay; > sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); > regval &= ~SDHCI_ITAPDLY_CHGWIN; > Acked-by: Michal Simek Thanks, Michal