From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23C65C433EF for ; Fri, 11 Feb 2022 09:38:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348668AbiBKJip (ORCPT ); Fri, 11 Feb 2022 04:38:45 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:56564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbiBKJin (ORCPT ); Fri, 11 Feb 2022 04:38:43 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DFD61E4D for ; Fri, 11 Feb 2022 01:38:41 -0800 (PST) Received: from ssl.serverraum.org (web.serverraum.org [172.16.0.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 897A922246; Fri, 11 Feb 2022 10:38:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1644572320; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/0VY6p8XEYrVjAYYqM8yMx6O8ot5EGTotP8AVGPlKIU=; b=qwWxcuI5Wph1pM6Nq3SmaOC4fumcPNgmGHis0tQZ81I8BIvMJ4V+xsgDa20CYfyxwo4H1j mtcVCvQuGTb/PzDGw1qnQOHLjqyMzctvG5Ir6hlltoyf2U7z7KV6t9rSs90qbqnU3NsZDc RfusVdpH8AT2ZTXCmxUQlm2MeeHx5Ck= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Fri, 11 Feb 2022 10:38:39 +0100 From: Michael Walle To: Shaik Sajida Bhanu Cc: dianders@chromium.org, tudor.ambarus@microchip.com, p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, quic_stummala@quicinc.com, quic_vbadigan@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com Subject: Re: [PATCH V6] mtd: spi-nor: winbond: Add support for winbond chip In-Reply-To: <1644571349-29649-1-git-send-email-quic_c_sbhanu@quicinc.com> References: <1644571349-29649-1-git-send-email-quic_c_sbhanu@quicinc.com> User-Agent: Roundcube Webmail/1.4.12 Message-ID: <98cb875e6f0de468a92692513f0eb47e@walle.cc> X-Sender: michael@walle.cc Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Am 2022-02-11 10:22, schrieb Shaik Sajida Bhanu: > Add support for winbond W25Q512NW-IM chip. > > Signed-off-by: Shaik Sajida Bhanu > Reviewed-by: Doug Anderson > --- > localhost / # cat > /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/spi16/ > spi16.0/spi-nor/jedec_id > ef8020 > > localhost / # cat > /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/spi16/ > spi16.0/spi-nor/manufacturer > winbond > > localhost / # cat > /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/spi16/ > spi16.0/spi-nor/partname > w25q512nwm > > localhost / # hexdump > /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/sp > i16/spi16.0/spi-nor/sfdp > 0000000 4653 5044 0106 ff01 0600 1001 0080 ff00 > 0000010 0084 0201 00d0 ff00 ffff ffff ffff ffff > 0000020 6800 6c65 6f6c 7720 726f 646c ffff ffff > 0000030 ffff ffff ffff ffff ffff ffff ffff ffff > * > 0000080 20e5 fffb ffff 1fff eb44 6b08 3b08 bb42 > 0000090 fffe ffff ffff 0000 ffff eb40 200c 520f > 00000a0 d810 0000 0233 00a6 e781 d914 63e9 3376 > 00000b0 757a 757a bdf7 5cd5 f719 ff5d 70e9 a5f9 > 00000c0 ffff ffff ffff ffff ffff ffff ffff ffff > 00000d0 0aff fff0 ff21 ffdc > 00000d8 Thanks, please provide a md5sum/sha256sum, too. It is to make sure we got the same binary when we pull the data out of the mail. > Changes since V1: > - Added space before name of the flash part as suggested by Doug. > > Changes since V2: > - Updated chip name as w25q512nwm as suggested by Doug. > > Changes since V3: > - Updated flash_info flags passing according to below patch. > > Changes since V4: > - Added OTP support for SPI card as suggested by Michael Walle. > - Updated SFDP flags passing as suggested by Pratyush Yadav. > > Changes since V5: > - Reordered flags passing info for spi nor as suggested by > Michael Walle. Did something go wrong here? The flags are still ordered the way it was in v5 ;) Also, the subject of the patch is still the old one. > - Added SFDP dump info in commit as suggested by Michael Walle. > --- > drivers/mtd/spi-nor/winbond.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/mtd/spi-nor/winbond.c > b/drivers/mtd/spi-nor/winbond.c > index 675f32c..315b9f6 100644 > --- a/drivers/mtd/spi-nor/winbond.c > +++ b/drivers/mtd/spi-nor/winbond.c > @@ -124,6 +124,10 @@ static const struct flash_info winbond_parts[] = { > { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024) > NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | > SPI_NOR_DUAL_READ) }, > + { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 1024) > + FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) > + PARSE_SFDP > + OTP_INFO(256, 3, 0x1000, 0x1000) }, > { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) > NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | > SPI_NOR_QUAD_READ) }, -michael