From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Alex Elder <elder@linaro.org>,
Srini Kandagatla <srinivas.kandagatla@linaro.org>
Cc: kernel@quicinc.com, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 06/11] firmware: qcom-shm-bridge: new driver
Date: Tue, 29 Aug 2023 10:22:04 +0200 [thread overview]
Message-ID: <98d1439c-3f92-c787-7aaa-926a7602d394@linaro.org> (raw)
In-Reply-To: <20230828192507.117334-7-bartosz.golaszewski@linaro.org>
On 28/08/2023 21:25, Bartosz Golaszewski wrote:
> +/**
> + * qcom_shm_bridge_pool_new - Create a new SHM Bridge memory pool.
> + *
> + * @size: Size of the pool.
> + *
> + * Creates a new Shared Memory Bridge pool from which users can allocate memory
> + * chunks. Must be called from process context.
> + *
> + * Return:
> + * Pointer to the newly created SHM Bridge pool with reference count set to 1
> + * or ERR_PTR().
> + */
> +struct qcom_shm_bridge_pool *qcom_shm_bridge_pool_new(size_t size)
> +{
> + struct device *dev;
> +
> + dev = bus_find_device_by_name(&platform_bus_type, NULL,
> + "qcom-shm-bridge");
> + if (!dev)
> + return ERR_PTR(-ENODEV);
> +
> + return qcom_shm_bridge_pool_new_for_dev(dev, size);
> +}
> +EXPORT_SYMBOL_GPL(qcom_shm_bridge_pool_new);
I do not see an user of this. Do not add exported symbols without users.
Drop export. I would even suggest drop the function entirely, why do we
need dead code?
> +
> +/**
> + * qcom_shm_bridge_pool_ref - Increate the refcount of an SHM Bridge pool.
> + *
> + * @pool: SHM Bridge pool of which the reference count to increase.
> + *
> + * Return:
> + * Pointer to the same pool object.
> + */
> +struct qcom_shm_bridge_pool *
> +qcom_shm_bridge_pool_ref(struct qcom_shm_bridge_pool *pool)
> +{
> + kref_get(&pool->refcount);
> +
> + return pool;
> +}
> +EXPORT_SYMBOL_GPL(qcom_shm_bridge_pool_ref);
Ditto
> +
> +/**
> + * qcom_shm_bridge_pool_unref - Decrease the refcount of an SHM Bridge pool.
> + *
> + * @pool: SHM Bridge pool of which the reference count to decrease.
> + *
> + * Once the reference count reaches 0, the pool is released.
> + */
> +void qcom_shm_bridge_pool_unref(struct qcom_shm_bridge_pool *pool)
> +{
> + kref_put(&pool->refcount, qcom_shm_bridge_pool_release);
> +}
> +EXPORT_SYMBOL_GPL(qcom_shm_bridge_pool_unref);
Ditto
> +
> +static void devm_qcom_shm_bridge_pool_unref(void *data)
> +{
> + struct qcom_shm_bridge_pool *pool = data;
> +
> + qcom_shm_bridge_pool_unref(pool);
> +}
> +
> +/**
> + * devm_qcom_shm_bridge_pool_new - Managed variant of qcom_shm_bridge_pool_new.
> + *
> + * @dev: Device for which to map memory and which will manage this pool.
> + * @size: Size of the pool.
> + *
> + * Return:
> + * Pointer to the newly created SHM Bridge pool with reference count set to 1
> + * or ERR_PTR().
> + */
> +struct qcom_shm_bridge_pool *
> +devm_qcom_shm_bridge_pool_new(struct device *dev, size_t size)
> +{
> + struct qcom_shm_bridge_pool *pool;
> + int ret;
> +
> + pool = qcom_shm_bridge_pool_new(size);
> + if (IS_ERR(pool))
> + return pool;
> +
> + ret = devm_add_action_or_reset(dev, devm_qcom_shm_bridge_pool_unref,
> + pool);
> + if (ret)
> + return ERR_PTR(ret);
> +
> + return pool;
> +}
> +EXPORT_SYMBOL_GPL(devm_qcom_shm_bridge_pool_new);
Ditto
> +
> +/**
> + * qcom_shm_bridge_alloc - Allocate a chunk of memory from an SHM Bridge pool.
> + *
> + * @pool: Pool to allocate memory from. May be NULL.
> + * @size: Number of bytes to allocate.
> + * @gfp: Allocation flags.
> + *
> + * If pool is NULL then the global fall-back pool is used.
> + *
> + * Return:
> + * Virtual address of the allocated memory or ERR_PTR(). Must be freed using
> + * qcom_shm_bridge_free().
> + */
> +void *qcom_shm_bridge_alloc(struct qcom_shm_bridge_pool *pool,
> + size_t size, gfp_t gfp)
> +{
> + struct qcom_shm_bridge_chunk *chunk __free(kfree) = NULL;
> + unsigned long vaddr;
> + int ret;
...
> +
> + return no_free_ptr(chunk)->vaddr;
> +}
> +EXPORT_SYMBOL_GPL(qcom_shm_bridge_alloc);
> +
> +/**
> + * qcom_shm_bridge_free - Free SHM Bridge memory allocated from the pool.
> + *
> + * @vaddr: Virtual address of the allocated memory to free.
> + */
> +void qcom_shm_bridge_free(void *vaddr)
> +{
> + struct qcom_shm_bridge_chunk *chunk;
> + struct qcom_shm_bridge_pool *pool;
> +
> + scoped_guard(spinlock_irqsave, &qcom_shm_bridge_chunks_lock)
> + chunk = radix_tree_delete_item(&qcom_shm_bridge_chunks,
> + (unsigned long)vaddr, NULL);
> + if (!chunk)
> + goto out_warn;
> +
> + pool = chunk->parent;
> +
> + guard(spinlock_irqsave)(&pool->lock);
> +
> + list_for_each_entry(chunk, &pool->chunks, siblings) {
> + if (vaddr != chunk->vaddr)
> + continue;
> +
> + gen_pool_free(pool->genpool, (unsigned long)chunk->vaddr,
> + chunk->size);
> + list_del(&chunk->siblings);
> + qcom_shm_bridge_pool_unref(pool);
> + kfree(chunk);
> + return;
> + }
> +
> +out_warn:
> + WARN(1, "Virtual address %p not allocated for SHM bridge", vaddr);
> +}
> +EXPORT_SYMBOL_GPL(qcom_shm_bridge_free);
> +
...
> +phys_addr_t qcom_shm_bridge_to_phys_addr(void *vaddr)
> +{
> + struct qcom_shm_bridge_chunk *chunk;
> + struct qcom_shm_bridge_pool *pool;
> +
> + guard(spinlock_irqsave)(&qcom_shm_bridge_chunks_lock);
> +
> + chunk = radix_tree_lookup(&qcom_shm_bridge_chunks,
> + (unsigned long)vaddr);
> + if (!chunk)
> + return 0;
> +
> + pool = chunk->parent;
> +
> + guard(spinlock_irqsave)(&pool->lock);
> +
> + return gen_pool_virt_to_phys(pool->genpool, (unsigned long)vaddr);
> +}
> +EXPORT_SYMBOL_GPL(qcom_shm_bridge_to_phys_addr);
Ditto
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-08-29 8:22 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-28 19:24 [PATCH 00/11] arm64: qcom: add and enable SHM Bridge support Bartosz Golaszewski
2023-08-28 19:24 ` [PATCH 01/11] firmware: qcom-scm: drop unneeded 'extern' specifiers Bartosz Golaszewski
2023-08-29 7:51 ` Krzysztof Kozlowski
2023-09-13 19:22 ` Bjorn Andersson
2023-08-28 19:24 ` [PATCH 02/11] firmware: qcom-scm: order includes alphabetically Bartosz Golaszewski
2023-08-29 7:52 ` Krzysztof Kozlowski
2023-08-28 19:24 ` [PATCH 03/11] firmware: qcom-scm: atomically assign and read the global __scm pointer Bartosz Golaszewski
2023-08-29 7:59 ` Krzysztof Kozlowski
2023-08-29 12:31 ` Bartosz Golaszewski
2023-08-29 12:48 ` Krzysztof Kozlowski
2023-10-17 8:24 ` Om Prakash Singh
2023-10-17 8:29 ` Bartosz Golaszewski
2023-08-28 19:25 ` [PATCH 04/11] firmware: qcom-scm: add support for SHM bridge operations Bartosz Golaszewski
2023-08-28 19:25 ` [PATCH 05/11] dt-bindings: document the Qualcomm TEE Shared Memory Bridge Bartosz Golaszewski
2023-08-29 8:02 ` Krzysztof Kozlowski
2023-08-29 9:30 ` Konrad Dybcio
2023-08-30 13:48 ` Bartosz Golaszewski
2023-08-30 14:31 ` Krzysztof Kozlowski
2023-08-30 14:39 ` Bartosz Golaszewski
2023-08-30 14:58 ` Krzysztof Kozlowski
2023-08-30 16:21 ` Bartosz Golaszewski
2023-08-28 19:25 ` [PATCH 06/11] firmware: qcom-shm-bridge: new driver Bartosz Golaszewski
2023-08-29 8:18 ` Krzysztof Kozlowski
2023-08-29 13:24 ` Bartosz Golaszewski
2023-08-29 16:47 ` Krzysztof Kozlowski
2023-08-30 13:09 ` Bartosz Golaszewski
2023-08-30 14:31 ` Krzysztof Kozlowski
2023-08-29 8:22 ` Krzysztof Kozlowski [this message]
2023-08-28 19:25 ` [PATCH 07/11] firmware: qcom-scm: use SHM bridge if available Bartosz Golaszewski
2023-08-29 5:32 ` kernel test robot
2023-08-29 5:43 ` kernel test robot
2023-08-28 19:25 ` [PATCH 08/11] arm64: defconfig: enable Qualcomm SHM bridge module Bartosz Golaszewski
2023-08-28 19:25 ` [PATCH 09/11] arm64: dts: qcom: sm8450: enable SHM bridge Bartosz Golaszewski
2023-08-28 19:25 ` [PATCH 10/11] arm64: dts: qcom: sa8775p: " Bartosz Golaszewski
2023-08-28 19:25 ` [PATCH 11/11] arm64: dts: qcom: sm8150: " Bartosz Golaszewski
2023-08-28 21:23 ` [PATCH 00/11] arm64: qcom: add and enable SHM Bridge support Dmitry Baryshkov
2023-08-29 19:03 ` Bartosz Golaszewski
2023-08-29 20:48 ` Dmitry Baryshkov
2023-09-14 19:36 ` (subset) " Bjorn Andersson
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