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Thu, 16 Apr 2026 05:32:53 -0700 (PDT) X-Received: by 2002:a17:903:98c:b0:2b4:5b1a:d09c with SMTP id d9443c01a7336-2b45b1ad1ddmr181277225ad.15.1776342772961; Thu, 16 Apr 2026 05:32:52 -0700 (PDT) Received: from [10.219.49.106] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b4782a93c7sm49156115ad.62.2026.04.16.05.32.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Apr 2026 05:32:52 -0700 (PDT) Message-ID: <9963cee3-cd65-4583-b21e-0ac4eaca9bf2@oss.qualcomm.com> Date: Thu, 16 Apr 2026 18:02:49 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/3] pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM To: Konrad Dybcio , Bjorn Andersson , Linus Walleij Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@oss.qualcomm.com References: <20260413122233.375945-1-ajay.nandam@oss.qualcomm.com> <20260413122233.375945-2-ajay.nandam@oss.qualcomm.com> <0975d136-0013-425b-a465-08f07efcefc7@oss.qualcomm.com> Content-Language: en-US From: Ajay Kumar Nandam In-Reply-To: <0975d136-0013-425b-a465-08f07efcefc7@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: 9UhS-oQvmj3GrF9PtOBWJbodkeCJmWzP X-Proofpoint-ORIG-GUID: 9UhS-oQvmj3GrF9PtOBWJbodkeCJmWzP X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE2MDExOSBTYWx0ZWRfX+jRBRjwxePO5 MHfcVNo1scLYapQXoQ/Eex2AxmVfvTtORtE/LLREAGaTptiqH5KWB9fiWzHknm8vQlyjTC+tizK fptZvvTzPVDGIBKVRez5PGEvNAf7GSzqlBnWdP+Ziermtca+Y0FTmvzaoVRkt67ddmSsUaX77U4 YL/YTGhweLCnsXf2x6CLSmIVfUycWUaFn5MvjJYIDYKS+B8l0TeFtVzN+Mt6Myt9+3RBM5a9wSn tTNz6CzkkvlyCVrr8ip9yxk9+ML0EfaqfErP96eXSTKJHzbd6Q0Rgoz81mQbcx7dzuui4VXYzmw pk859DdCYjEchFsiKG9+gGbX9DnkEpS27q99c8LM0smZ2PLyNG5OIdXquZRyUsjSF9N/G+pyrWB hg0pRSJnV//lr5G3XYkodOtHDDdvhq5UJNzInkpAemlMlYPfz+MWU+HYOO9ovNoQ1C/1ro27mkI gEJi3zkjmMiiXtgPTng== X-Authority-Analysis: v=2.4 cv=YtE/gYYX c=1 sm=1 tr=0 ts=69e0d6f6 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=3rPMQvdw1QVwHz-kkGoA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_03,2026-04-16_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 adultscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604160119 On 4/14/2026 2:07 PM, Konrad Dybcio wrote: > On 4/13/26 2:22 PM, Ajay Kumar Nandam wrote: >> Convert the LPASS LPI pinctrl driver to use the PM clock framework for >> runtime power management. >> >> This allows the LPASS LPI pinctrl driver to drop clock votes when idle, >> improves power efficiency on platforms using LPASS LPI island mode, and >> aligns the driver with common runtime PM patterns used across Qualcomm >> LPASS subsystems. >> >> Signed-off-by: Ajay Kumar Nandam >> --- >> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 36 +++++++++++++------ >> drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 2 ++ >> .../pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 5 +++ >> 3 files changed, 32 insertions(+), 11 deletions(-) >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c >> index 76aed3296..6d50e06ef 100644 >> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c >> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c >> @@ -14,15 +14,16 @@ >> >> #include >> #include >> +#include >> #include >> >> #include "../pinctrl-utils.h" >> >> #include "pinctrl-lpass-lpi.h" >> +#include > > Please move it up, together with other non-local includes > > [...] ACK, will correct in the next version Thanks Ajay Kumar Nandam > >> + pm_runtime_set_autosuspend_delay(dev, 100); >> + pm_runtime_use_autosuspend(dev); >> + pm_runtime_enable(dev); > > devm_pm_runtime_enable() will let you drop the manual disablement below and > in .remove() ACK, will switch in the next version. Thanks Ajay Kumar Nandam > >> >> pctrl->desc.pctlops = &lpi_gpio_pinctrl_ops; >> pctrl->desc.pmxops = &lpi_gpio_pinmux_ops; >> @@ -539,20 +540,33 @@ int lpi_pinctrl_probe(struct platform_device *pdev) >> return 0; >> >> err_pinctrl: >> + pm_runtime_disable(dev); >> mutex_destroy(&pctrl->lock); >> - clk_bulk_disable_unprepare(MAX_LPI_NUM_CLKS, pctrl->clks); >> >> return ret; >> } > > [...] > >> --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c >> +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c >> @@ -139,10 +139,15 @@ static const struct of_device_id lpi_pinctrl_of_match[] = { >> }; >> MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match); >> >> +static const struct dev_pm_ops lpi_pinctrl_pm_ops = { >> + RUNTIME_PM_OPS(lpi_pinctrl_runtime_suspend, lpi_pinctrl_runtime_resume, NULL) >> +}; >> + >> static struct platform_driver lpi_pinctrl_driver = { >> .driver = { >> .name = "qcom-sc7280-lpass-lpi-pinctrl", >> .of_match_table = lpi_pinctrl_of_match, >> + .pm = pm_ptr(&lpi_pinctrl_pm_ops), > > I believe SoCs other than kodiak also require this change to avoid > regressions. This patch is currently limited to SC7280, where the runtime PM behavior has been validated. Based on this feedback, I’ll revisit the series and extend the same runtime PM support to the other LPASS‑LPI SoC drivers that share this block, so the behavior remains consistent across platforms and avoids potential regressions. Thanks Ajay Kumar Nandam > > Konrad