Re: [PATCH v3 1/3] arm: perf: Include threshold control fields valid in PMEVTYPER mask

[James Clark <james.clark@arm.com>]

On 11/10/2023 09:24, Oliver Upton wrote:
> Hi James,
> 
> On Tue, Oct 10, 2023 at 03:15:41PM +0100, James Clark wrote:
>> FEAT_PMUv3_TH (Armv8.8) adds two new fields to PMEVTYPER, so include
>> them in the mask. These aren't writable on 32 bit kernels as they are in
>> the high part of the register, so split the mask definition to the asm
>> files for each platform.
>>
>> Now where the value is used in some parts of KVM, include the asm file.
>> There is no impact on guest PMUs emulated with KVM because the new
>> fields are ignored when constructing the attributes for opening the
>> event. But if threshold support is added to KVM at a later time no
>> change to the mask will be needed.
> 
> KVM should treat TH and TC as RES0 if the feature isn't virtualized. I'd

Ok will keep that in mind for if we virtualize it in the future. It
looks like it will have to happen conditionally depending on the
presence of the feature. But it looks like your current patch has the
res0 fix for now.

> rather move KVM away from using ARMV8_PMU_EVTYPE_MASK in the first
> place. Looks like we already have an issue with the NSH bit, so I've
> sent the below patch to fix it.
> 
> https://lore.kernel.org/kvmarm/20231011081649.3226792-3-oliver.upton@linux.dev/
>