From: Sascha Bischoff <Sascha.Bischoff@arm.com>
To: "lpieralisi@kernel.org" <lpieralisi@kernel.org>
Cc: "yuzenghui@huawei.com" <yuzenghui@huawei.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
Timothy Hayes <Timothy.Hayes@arm.com>, nd <nd@arm.com>,
"oliver.upton@linux.dev" <oliver.upton@linux.dev>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Joey Gouly <Joey.Gouly@arm.com>,
"maz@kernel.org" <maz@kernel.org>,
Suzuki Poulose <Suzuki.Poulose@arm.com>,
"will@kernel.org" <will@kernel.org>
Subject: Re: [PATCH 1/5] irqchip/gic-v5: Skip deactivate for forwarded PPI interrupts
Date: Fri, 27 Jun 2025 09:49:31 +0000 [thread overview]
Message-ID: <99c4946f2857e165d74d498476be75db21ff4cee.camel@arm.com> (raw)
In-Reply-To: <aFlw4lOj8tUGrSTb@lpieralisi>
On Mon, 2025-06-23 at 17:21 +0200, Lorenzo Pieralisi wrote:
> On Fri, Jun 20, 2025 at 04:07:50PM +0000, Sascha Bischoff wrote:
> > If a PPI interrupt is forwarded to a guest, skip the deactivate and
> > only EOI. Rely on the guest deactivating the both the virtual and
>
> "deactivating both"
Done.
>
> > physical interrupts (due to ICH_LRx_EL2.HW being set) later on as
> > part
> > of handling the injected interrupt. This mimics the behaviour seen
> > on
> > native GICv3.
> >
> > This is part of adding support for the GICv3 compatibility mode on
> > a
> > GICv5 host.
> >
> > Co-authored-by: Timothy Hayes <timothy.hayes@arm.com>
> > Signed-off-by: Timothy Hayes <timothy.hayes@arm.com>
> > Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
> > ---
> > drivers/irqchip/irq-gic-v5.c | 17 +++++++++++++++++
> > 1 file changed, 17 insertions(+)
>
> Reviewed-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Done. Thanks!
Sascha
next prev parent reply other threads:[~2025-06-27 9:50 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-20 16:07 [PATCH 0/5] KVM: arm64: Enable GICv3 guests on GICv5 hosts using FEAT_GCIE_LEGACY Sascha Bischoff
2025-06-20 16:07 ` [PATCH 1/5] irqchip/gic-v5: Skip deactivate for forwarded PPI interrupts Sascha Bischoff
2025-06-23 15:21 ` Lorenzo Pieralisi
2025-06-27 9:49 ` Sascha Bischoff [this message]
2025-06-20 16:07 ` [PATCH 2/5] irqchip/gic-v5: Populate struct gic_kvm_info Sascha Bischoff
2025-06-23 15:14 ` Lorenzo Pieralisi
2025-06-27 9:49 ` Sascha Bischoff
2025-06-20 16:07 ` [PATCH 4/5] KVM: arm64: gic-v5: Support GICv3 compat Sascha Bischoff
2025-06-20 20:20 ` Oliver Upton
2025-06-20 23:02 ` Oliver Upton
2025-06-23 13:11 ` Sascha Bischoff
2025-06-22 12:19 ` Marc Zyngier
2025-06-22 12:37 ` Oliver Upton
2025-06-23 13:02 ` Sascha Bischoff
2025-06-20 16:07 ` [PATCH 3/5] arm64/sysreg: Add ICH_VCTLR_EL2 Sascha Bischoff
2025-06-20 16:07 ` [PATCH 5/5] KVM: arm64: gic-v5: Probe for GICv5 Sascha Bischoff
2025-06-20 20:25 ` Oliver Upton
2025-06-23 13:12 ` Sascha Bischoff
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