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As drivers are > > converted to DMA API usage we can eventually get rid of this. Initially > > the flag is enabled for TegraDRM and Host1x devices. > >=20 > > On multi_v7_defconfig (where CONFIG_ARM_DMA_USE_IOMMU was always > > enabled), this will fix TegraDRM probing with certain probe orderings > > where the legacy implementation's lack of support for multiple devices > > in one IOMMU group would cause breakage. > >=20 > > On tegra_defconfig, as this now enables CONFIG_ARM_DMA_USE_IOMMU, all > > devices move to either the legacy ARM DMA path or the new one. This > > should in principle not cause issues as the drivers would already have > > been verified on multi_v7_defconfig. > >=20 > > Also set .release_domain to the identity domain to ensure the AS is > > released appropriately now that the domain can be non-static. > >=20 > > Signed-off-by: Mikko Perttunen > > --- > > drivers/iommu/Kconfig | 1 + > > drivers/iommu/tegra-smmu.c | 59 ++++++++++++++++++++++++++++++++= ++++++--- > > drivers/memory/tegra/tegra114.c | 13 +++++---- > > drivers/memory/tegra/tegra124.c | 10 ++++--- > > drivers/memory/tegra/tegra30.c | 16 ++++++----- > > include/soc/tegra/mc.h | 7 +++++ > > 6 files changed, 87 insertions(+), 19 deletions(-) > >=20 > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > > index 6e07bd69467a..817e84e0e6ab 100644 > > --- a/drivers/iommu/Kconfig > > +++ b/drivers/iommu/Kconfig > > @@ -252,6 +252,7 @@ config TEGRA_IOMMU_SMMU > > depends on TEGRA_AHB > > depends on TEGRA_MC > > select IOMMU_API > > + select ARM_DMA_USE_IOMMU if ARM > > help > > This driver supports the IOMMU hardware (SMMU) found on NVIDIA Teg= ra > > SoCs (Tegra30 up to Tegra210). > > diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c > > index 6779528a9e7c..1c1910f25553 100644 > > --- a/drivers/iommu/tegra-smmu.c > > +++ b/drivers/iommu/tegra-smmu.c > > @@ -994,16 +994,31 @@ static int tegra_smmu_of_xlate(struct device *dev= , > > =20 > > static int tegra_smmu_def_domain_type(struct device *dev) > > { > > + struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); > > + struct tegra_smmu *smmu =3D dev_iommu_priv_get(dev); > > + unsigned int i; > > + > > + if (!fwspec || !smmu) > > + return IOMMU_DOMAIN_IDENTITY; >=20 > Dead code - by this point tegra_smmu_probe_device() has already run (and= =20 > we've literally reached this call via dev_iommu_ops(dev)) so the device=20 > is definitely valid. >=20 > > + > > /* > > - * FIXME: For now we want to run all translation in IDENTITY mode, du= e > > - * to some device quirks. Better would be to just quirk the troubled > > - * devices. > > + * Only clients known to work with the DMA API get a DMA default doma= in. > > + * The rest keep running in identity mode. > > */ > > - return IOMMU_DOMAIN_IDENTITY; > > + for (i =3D 0; i < fwspec->num_ids; i++) { > > + const struct tegra_smmu_swgroup *group; > > + > > + group =3D tegra_smmu_find_swgroup(smmu, fwspec->ids[i]); > > + if (!group || !group->use_dma_api) >=20 > Similarly, dev->iommu_group is already assigned with whatever valid=20 > group tegra_smmu_device_group() returned, so you could perhaps just do a= =20 > single iteration over smmu->groups for the lookup. Yeah, this was way overcomplicated. I've rewritten the function to=20 directly pass the fwspec ID to tegra_smmu_find_swgroup - much simpler. Thanks! Mikko >=20 > Thanks, > Robin. >=20 > > + return IOMMU_DOMAIN_IDENTITY; > > + } > > + > > + return IOMMU_DOMAIN_DMA; > > } > > =20 > > static const struct iommu_ops tegra_smmu_ops =3D { > > .identity_domain =3D &tegra_smmu_identity_domain, > > + .release_domain =3D &tegra_smmu_identity_domain, > > .def_domain_type =3D &tegra_smmu_def_domain_type, > > .domain_alloc_paging =3D tegra_smmu_domain_alloc_paging, > > .probe_device =3D tegra_smmu_probe_device, > > @@ -1108,6 +1123,40 @@ static void tegra_smmu_debugfs_exit(struct tegra= _smmu *smmu) > > debugfs_remove_recursive(smmu->debugfs); > > } > > =20 > > +/* > > + * The default domain type is a property of the IOMMU group, so all sw= groups in > > + * one group must agree on use_dma_api. Otherwise the core sees confli= cting > > + * def_domain_type and falls back to identity for the whole group. > > + */ > > +static void tegra_smmu_check_groups(struct tegra_smmu *smmu) > > +{ > > + const struct tegra_smmu_soc *soc =3D smmu->soc; > > + unsigned int i, j; > > + > > + for (i =3D 0; i < soc->num_groups; i++) { > > + const struct tegra_smmu_group_soc *group =3D &soc->groups[i]; > > + int dma_api =3D -1; > > + > > + for (j =3D 0; j < group->num_swgroups; j++) { > > + const struct tegra_smmu_swgroup *swgrp; > > + > > + swgrp =3D tegra_smmu_find_swgroup(smmu, > > + group->swgroups[j]); > > + if (!swgrp) > > + continue; > > + > > + if (dma_api < 0) > > + dma_api =3D swgrp->use_dma_api; > > + else if (swgrp->use_dma_api !=3D !!dma_api) > > + break; > > + } > > + > > + WARN(j < group->num_swgroups, > > + "SMMU group %s mixes DMA API and identity swgroups\n", > > + group->name); > > + } > > +} > > + > > struct tegra_smmu *tegra_smmu_probe(struct device *dev, > > const struct tegra_smmu_soc *soc, > > struct tegra_mc *mc) > > @@ -1142,6 +1191,8 @@ struct tegra_smmu *tegra_smmu_probe(struct device= *dev, > > smmu->dev =3D dev; > > smmu->mc =3D mc; > > =20 > > + tegra_smmu_check_groups(smmu); > > + > > smmu->pfn_mask =3D > > BIT_MASK(mc->soc->num_address_bits - SMMU_PTE_SHIFT) - 1; > > dev_dbg(dev, "address bits: %u, PFN mask: %#lx\n", > > diff --git a/drivers/memory/tegra/tegra114.c b/drivers/memory/tegra/teg= ra114.c > > index 2883c4f91144..024c63bdd480 100644 > > --- a/drivers/memory/tegra/tegra114.c > > +++ b/drivers/memory/tegra/tegra114.c > > @@ -1029,15 +1029,18 @@ static const struct tegra_mc_client tegra114_mc= _clients[] =3D { > > =20 > > static const struct tegra_smmu_swgroup tegra114_swgroups[] =3D { > > { .name =3D "dc", .swgroup =3D TEGRA_SWGROUP_DC, .reg = =3D 0x240, > > - .defer_enable =3D true }, > > + .defer_enable =3D true, .use_dma_api =3D true }, > > { .name =3D "dcb", .swgroup =3D TEGRA_SWGROUP_DCB, .reg = =3D 0x244, > > - .defer_enable =3D true }, > > + .defer_enable =3D true, .use_dma_api =3D true }, > > { .name =3D "epp", .swgroup =3D TEGRA_SWGROUP_EPP, .reg = =3D 0x248 }, > > - { .name =3D "g2", .swgroup =3D TEGRA_SWGROUP_G2, .reg = =3D 0x24c }, > > + { .name =3D "g2", .swgroup =3D TEGRA_SWGROUP_G2, .reg = =3D 0x24c, > > + .use_dma_api =3D true }, > > { .name =3D "avpc", .swgroup =3D TEGRA_SWGROUP_AVPC, .reg = =3D 0x23c }, > > - { .name =3D "nv", .swgroup =3D TEGRA_SWGROUP_NV, .reg = =3D 0x268 }, > > + { .name =3D "nv", .swgroup =3D TEGRA_SWGROUP_NV, .reg = =3D 0x268, > > + .use_dma_api =3D true }, > > { .name =3D "hda", .swgroup =3D TEGRA_SWGROUP_HDA, .reg = =3D 0x254 }, > > - { .name =3D "hc", .swgroup =3D TEGRA_SWGROUP_HC, .reg = =3D 0x250 }, > > + { .name =3D "hc", .swgroup =3D TEGRA_SWGROUP_HC, .reg = =3D 0x250, > > + .use_dma_api =3D true }, > > { .name =3D "msenc", .swgroup =3D TEGRA_SWGROUP_MSENC, .reg = =3D 0x264 }, > > { .name =3D "ppcs", .swgroup =3D TEGRA_SWGROUP_PPCS, .reg = =3D 0x270 }, > > { .name =3D "vde", .swgroup =3D TEGRA_SWGROUP_VDE, .reg = =3D 0x27c }, > > diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/teg= ra124.c > > index a38fbf2baf6c..17068aaf163f 100644 > > --- a/drivers/memory/tegra/tegra124.c > > +++ b/drivers/memory/tegra/tegra124.c > > @@ -1071,13 +1071,14 @@ static const struct tegra_mc_client tegra124_mc= _clients[] =3D { > > =20 > > static const struct tegra_smmu_swgroup tegra124_swgroups[] =3D { > > { .name =3D "dc", .swgroup =3D TEGRA_SWGROUP_DC, .reg = =3D 0x240, > > - .defer_enable =3D true }, > > + .defer_enable =3D true, .use_dma_api =3D true }, > > { .name =3D "dcb", .swgroup =3D TEGRA_SWGROUP_DCB, .reg = =3D 0x244, > > - .defer_enable =3D true }, > > + .defer_enable =3D true, .use_dma_api =3D true }, > > { .name =3D "afi", .swgroup =3D TEGRA_SWGROUP_AFI, .reg = =3D 0x238 }, > > { .name =3D "avpc", .swgroup =3D TEGRA_SWGROUP_AVPC, .reg = =3D 0x23c }, > > { .name =3D "hda", .swgroup =3D TEGRA_SWGROUP_HDA, .reg = =3D 0x254 }, > > - { .name =3D "hc", .swgroup =3D TEGRA_SWGROUP_HC, .reg = =3D 0x250 }, > > + { .name =3D "hc", .swgroup =3D TEGRA_SWGROUP_HC, .reg = =3D 0x250, > > + .use_dma_api =3D true }, > > { .name =3D "msenc", .swgroup =3D TEGRA_SWGROUP_MSENC, .reg = =3D 0x264 }, > > { .name =3D "ppcs", .swgroup =3D TEGRA_SWGROUP_PPCS, .reg = =3D 0x270 }, > > { .name =3D "sata", .swgroup =3D TEGRA_SWGROUP_SATA, .reg = =3D 0x274 }, > > @@ -1093,7 +1094,8 @@ static const struct tegra_smmu_swgroup tegra124_s= wgroups[] =3D { > > { .name =3D "sdmmc2a", .swgroup =3D TEGRA_SWGROUP_SDMMC2A, .reg = =3D 0xa98 }, > > { .name =3D "sdmmc3a", .swgroup =3D TEGRA_SWGROUP_SDMMC3A, .reg = =3D 0xa9c }, > > { .name =3D "sdmmc4a", .swgroup =3D TEGRA_SWGROUP_SDMMC4A, .reg = =3D 0xaa0 }, > > - { .name =3D "vic", .swgroup =3D TEGRA_SWGROUP_VIC, .reg = =3D 0x284 }, > > + { .name =3D "vic", .swgroup =3D TEGRA_SWGROUP_VIC, .reg = =3D 0x284, > > + .use_dma_api =3D true }, > > { .name =3D "vi", .swgroup =3D TEGRA_SWGROUP_VI, .reg = =3D 0x280 }, > > }; > > =20 > > diff --git a/drivers/memory/tegra/tegra30.c b/drivers/memory/tegra/tegr= a30.c > > index 0ee4715413ba..df6b5a499ccc 100644 > > --- a/drivers/memory/tegra/tegra30.c > > +++ b/drivers/memory/tegra/tegra30.c > > @@ -1140,19 +1140,23 @@ static const struct tegra_mc_client tegra30_mc_= clients[] =3D { > > =20 > > static const struct tegra_smmu_swgroup tegra30_swgroups[] =3D { > > { .name =3D "dc", .swgroup =3D TEGRA_SWGROUP_DC, .reg =3D 0x240, > > - .defer_enable =3D true }, > > + .defer_enable =3D true, .use_dma_api =3D true }, > > { .name =3D "dcb", .swgroup =3D TEGRA_SWGROUP_DCB, .reg =3D 0x244, > > - .defer_enable =3D true }, > > + .defer_enable =3D true, .use_dma_api =3D true }, > > { .name =3D "epp", .swgroup =3D TEGRA_SWGROUP_EPP, .reg =3D 0x248 = }, > > - { .name =3D "g2", .swgroup =3D TEGRA_SWGROUP_G2, .reg =3D 0x24c }= , > > + { .name =3D "g2", .swgroup =3D TEGRA_SWGROUP_G2, .reg =3D 0x24c, > > + .use_dma_api =3D true }, > > { .name =3D "mpe", .swgroup =3D TEGRA_SWGROUP_MPE, .reg =3D 0x264 = }, > > { .name =3D "vi", .swgroup =3D TEGRA_SWGROUP_VI, .reg =3D 0x280 = }, > > { .name =3D "afi", .swgroup =3D TEGRA_SWGROUP_AFI, .reg =3D 0x238 = }, > > { .name =3D "avpc", .swgroup =3D TEGRA_SWGROUP_AVPC, .reg =3D 0x23c = }, > > - { .name =3D "nv", .swgroup =3D TEGRA_SWGROUP_NV, .reg =3D 0x268 }= , > > - { .name =3D "nv2", .swgroup =3D TEGRA_SWGROUP_NV2, .reg =3D 0x26c }= , > > + { .name =3D "nv", .swgroup =3D TEGRA_SWGROUP_NV, .reg =3D 0x268, > > + .use_dma_api =3D true }, > > + { .name =3D "nv2", .swgroup =3D TEGRA_SWGROUP_NV2, .reg =3D 0x26c, > > + .use_dma_api =3D true }, > > { .name =3D "hda", .swgroup =3D TEGRA_SWGROUP_HDA, .reg =3D 0x254 = }, > > - { .name =3D "hc", .swgroup =3D TEGRA_SWGROUP_HC, .reg =3D 0x250 }= , > > + { .name =3D "hc", .swgroup =3D TEGRA_SWGROUP_HC, .reg =3D 0x250, > > + .use_dma_api =3D true }, > > { .name =3D "ppcs", .swgroup =3D TEGRA_SWGROUP_PPCS, .reg =3D 0x270 = }, > > { .name =3D "sata", .swgroup =3D TEGRA_SWGROUP_SATA, .reg =3D 0x278 = }, > > { .name =3D "vde", .swgroup =3D TEGRA_SWGROUP_VDE, .reg =3D 0x27c = }, > > diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h > > index ea67972fd585..1cbd990fc0f4 100644 > > --- a/include/soc/tegra/mc.h > > +++ b/include/soc/tegra/mc.h > > @@ -78,6 +78,13 @@ struct tegra_smmu_swgroup { > > * tegra_smmu_enable_translation(). > > */ > > bool defer_enable; > > + > > + /* > > + * Set once the clients behind this swgroup are known to work with an > > + * IOMMU_DOMAIN_DMA default domain. All swgroups of a > > + * tegra_smmu_group_soc must agree. > > + */ > > + bool use_dma_api; > > }; > > =20 > > struct tegra_smmu_group_soc { > >=20 >=20 >=20