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AJvYcCXCCNZoWNc3aYIQN0nTj1DFat+bGf8uTXwyXR68jkEujAUVu5Yys5aMpkUOwOGOIpxozJITPaxWdq0FZN0=@vger.kernel.org X-Gm-Message-State: AOJu0Yzb2vdybOSAwX/VdcUXH9Lp/C8Xs9EDdP88vfm2h/aM+ZWVHxUt MOMDOMy5Jaz7G2HXS+B1Jk7+nQCSgqTfjf/0XEIiFiDC405n2lvU88CWggt2OIE= X-Google-Smtp-Source: AGHT+IHdsyhSLBjiurVvaE79aFCz+ddRrXoXvKxH/wwYSLEfj/5MHZEUqYeob8Osk05sYIoi0UFnqA== X-Received: by 2002:a5d:67cc:0:b0:371:8283:94c1 with SMTP id ffacd0b85a97d-373117be78bmr10635617f8f.0.1724764415477; Tue, 27 Aug 2024 06:13:35 -0700 (PDT) Received: from [192.168.0.25] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a86e549df50sm109365166b.53.2024.08.27.06.13.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Aug 2024 06:13:34 -0700 (PDT) Message-ID: <9a1ca52b-6eae-4897-891e-6fad3d981c6e@linaro.org> Date: Tue, 27 Aug 2024 14:13:33 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] clk: qcom: gcc-x1e80100: Don't use parking clk_ops for QUPs To: Konrad Dybcio , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rajendra Nayak , Sibi Sankar , Abel Vesa Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong References: <20240823-x1e80100-clk-fix-v1-1-0b1b4f5a96e8@linaro.org> Content-Language: en-US From: Bryan O'Donoghue In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 26/08/2024 14:44, Konrad Dybcio wrote: > On 23.08.2024 2:58 PM, Bryan O'Donoghue wrote: >> Per Stephen Boyd's explanation in the link below, QUP RCG clocks do not >> need to be parked when switching frequency. A side-effect in parking to a >> lower frequency can be a momentary invalid clock driven on an in-use serial >> peripheral. >> >> This can cause "junk" to spewed out of a UART as a low-impact example. On >> the x1e80100-crd this serial port junk can be observed on linux-next. >> >> Apply a similar fix to the x1e80100 Global Clock controller to remediate. >> >> Link: https://lore.kernel.org/all/20240819233628.2074654-3-swboyd@chromium.org/ >> Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100") >> Fixes: 929c75d57566 ("clk: qcom: gcc-sm8550: Mark RCGs shared where applicable") >> Suggested-by: Neil Armstrong >> Signed-off-by: Bryan O'Donoghue >> --- >> I ran into some junk on the x1e80100 serial port and asked around to see if >> someone had already found and fixed. >> >> Neil pointed me at Stephen's fix for sm8550 which I found is also required >> to fix the same thing x1e80100. >> --- > > Reviewed-by: Konrad Dybcio > > Mind also fixing up 8650 that seems to have this issue? > > Konrad np