From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757569AbdKOKdC convert rfc822-to-8bit (ORCPT ); Wed, 15 Nov 2017 05:33:02 -0500 Received: from 19pmail.ess.barracuda.com ([64.235.150.244]:53796 "EHLO 19pmail.ess.barracuda.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757502AbdKOKcz (ORCPT ); Wed, 15 Nov 2017 05:32:55 -0500 Subject: Re: [PATCH] MIPS: Fix exception entry when CONFIG_EVA enabled To: "Maciej W. Rozycki" , James Hogan CC: Corey Minyard , Ralf Baechle , Matthew Fortune , , , "Jason A. Donenfeld" , "Paul Burton" References: <1507712360-20657-1-git-send-email-matt.redfearn@mips.com> <605f6a96-a843-085c-efc6-a2c0f2afd84a@mvista.com> <20171031234853.GD15260@jhogan-linux> From: Matt Redfearn Message-ID: <9a2d2b4b-9b6a-a7e2-78be-ff6a019d6e05@mips.com> Date: Wed, 15 Nov 2017 10:32:37 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8BIT X-Originating-IP: [10.150.130.83] X-BESS-ID: 1510741968-637138-17943-328037-1 X-BESS-VER: 2017.14-r1710272128 X-BESS-Apparent-Source-IP: 12.201.5.28 X-BESS-Outbound-Spam-Score: 0.51 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.186949 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.01 BSF_SC0_SA_TO_FROM_DOMAIN_MATCH META: Sender Domain Matches Recipient Domain 0.50 BSF_RULE7568M META: Custom Rule 7568M 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.51 using account:ESS59374 scores of KILL_LEVEL=7.0 tests=BSF_SC0_SA_TO_FROM_DOMAIN_MATCH, BSF_RULE7568M, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/11/17 10:47, Maciej W. Rozycki wrote: > On Tue, 31 Oct 2017, James Hogan wrote: > >>> I looked this over pretty carefully and it looks correct to me.  It >>> makes no difference >>> in the instructions generated by the non-EVA case.  I shouldn't have >>> missed this :(. >>> >>> Reviewed-by: Corey Minyard >> >> Yeh, having stared at it for a little while it looks correct to me too. >> >> Reviewed-by: James Hogan > > How about getting rid of the `noreorder' mode and the manually scheduled > delay slot here altogether though, as I outlined? > > Maciej > Hi Maciej, I like the change you propose, however I can't coax GAS to reorder the instructions appropriately. With this patch on top of 4.14: --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -195,14 +195,16 @@ .set push .set noat .set reorder - mfc0 k0, CP0_STATUS - sll k0, 3 /* extract cu0 bit */ - .set noreorder - bltz k0, 8f - move k0, sp + mfc0 k1, CP0_STATUS + sll k1, 3 /* extract cu0 bit */ + + move k0, sp .if \docfi .cfi_register sp, k0 .endif + + bltz k1, 8f + #ifdef CONFIG_EVA /* * Flush interAptiv's Return Prediction Stack (RPS) by writing @@ -228,7 +230,6 @@ MFC0 k0, CP0_ENTRYHI MTC0 k0, CP0_ENTRYHI #endif - .set reorder /* Called from user mode, new stack. */ get_saved_sp docfi=\docfi tosp=1 8: The generated assembly is: 80405d00 : 80405d00: 401b6000 mfc0 k1,c0_status 80405d04: 001bd8c0 sll k1,k1,0x3 80405d08: 03a0d025 move k0,sp 80405d0c: 07600007 bltz k1,80405d2c 80405d10: 00000000 nop 80405d14: 401a2000 mfc0 k0,c0_context Apparently GAS has not been able to reorder the move into the branch delay slot for some reason. Any ideas? Thanks, Matt