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A message whose cumulative RX length exceeds > AMD_SPI_FIFO_SIZE can therefore issue an SPI transaction before being > rejected. > > Check tx_len + rx_len while walking the message and drop the drain-loop > check. This validates the complete message before executing the command. > > Tested with a user-space replica covering TX, RX and mixed messages at > the 70/71-byte boundary. Oversized split-RX messages are now rejected > without executing the command. No AMD SPI hardware was available. > > Assisted-by: LLM > Suggested-by: Krishnamoorthi M > Fixes: e2f4edfc061e ("spi: amd: fix len==0 underflow and FIFO overflow") > Reviewed-by: Guanglei Zhu > Signed-off-by: Weibin Liu Thanks, patch looks good to me: Reviewed-by: Krishnamoorthi M Regards, Krishna