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Mon, 09 Nov 2026 12:48:41 -0800 (PST) Received: from [198.18.0.1] ([45.95.212.227]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cdd8d7b37casm129038a12.22.2026.11.09.12.48.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Nov 2026 12:48:40 -0800 (PST) Message-ID: <9a73588a-f5ac-4c9f-bb83-97224173aee7@gmail.com> Date: Tue, 10 Nov 2026 04:48:35 +0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: rockchip: use rgmii-id for LubanCat 4 gmac1 To: Andrew Lunn Cc: Conor Dooley , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org References: <20261109191515.252449-1-cyan2254650260@gmail.com> Content-Language: en-US From: Pufan Jin In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2026/11/10 03:55, Andrew Lunn wrote: > On Tue, Nov 10, 2026 at 03:15:15AM +0800, Pufan Jin wrote: >> The LubanCat 4 PCB adds ~2ns of trace delay on both TXC and RXC, but >> that alone is not sufficient for reliable RGMII operation. With >> phy-mode = "rgmii" and zero MAC delays the link comes up at 1Gbps but >> drops ~90% of the packets; the PHY's internal TX/RX delay is required. > Sorry, but this does not make sense. 4ns of delay is 2ns too many. > > You need a proper explanation of what is going on here. > > Andrew Hi Andrew, The old comment was wrong. Here is what is actually happening on the board, with measurements. Conf A: phy-mode = "rgmii", no tx_delay/rx_delay in the DT. dwmac-rk programs its defaults tx_delay = 0x30, rx_delay = 0x10; the PHY's internal delays are disabled. On the board's direct 1Gbps link:   host -> board ping:  200 sent, 20 received, 90% loss   board -> host ping:  200 sent, 19 received, 90.5% loss   mmc_rx_crc_error:    118 Conf B: phy-mode = "rgmii-id". dwmac-rk programs (0, 0) into the MAC; the PHY inserts its internal 2ns TX/RX delays. On the same direct link:   host -> board ping:  200/200, 0% loss   board -> host ping:  200/200, 0% loss   iperf3 TX:           921 Mbps   iperf3 RX:           941 Mbps   mmc_rx_crc_error:    0 The vendor BSP DTS for this board is:     phy-mode = "rgmii-rxid";     tx_delay = <0x1b>;     /* rx_delay = <0x00>; */     rtl8211f,tx-delay = <0x1b>; The vendor configures an explicit MAC TX delay and PHY TX/RX delays. The mainline RTL8211F driver only supports the standard 2ns TX/RX enable selected by phy-mode; it cannot program the vendor's fine-grained rtl8211f,tx-delay. With "rgmii-id" the PHY provides the 2ns TX/RX clock delay and the MAC delays are zero, which is the tested mainline configuration. The "PCB adds ~2ns" text was never measured and is removed. I will follow up with a v2 containing the corrected comment and these measurements. Pufan