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Mon, 04 Nov 2024 06:32:03 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4A46W22b019789 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 4 Nov 2024 06:32:02 GMT Received: from [10.214.227.50] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sun, 3 Nov 2024 22:31:57 -0800 Message-ID: <9ab96e76-533e-4163-aef5-71a0ca5e82d3@quicinc.com> Date: Mon, 4 Nov 2024 12:01:12 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v16 1/5] iommu/arm-smmu: re-enable context caching in smmu reset operation To: Will Deacon CC: , , , , , , , , , , , , , Konrad Dybcio References: <20241008125410.3422512-1-quic_bibekkum@quicinc.com> <20241008125410.3422512-2-quic_bibekkum@quicinc.com> <20241024125241.GD30704@willie-the-truck> <092db44e-f254-4abd-abea-e9a64e70df12@quicinc.com> <20241029124708.GA4241@willie-the-truck> <20241101121024.GC8518@willie-the-truck> Content-Language: en-US From: Bibek Kumar Patro In-Reply-To: <20241101121024.GC8518@willie-the-truck> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Qt4_iYirzjSLkU7KnyZu9WJDVfsTu0OC X-Proofpoint-ORIG-GUID: Qt4_iYirzjSLkU7KnyZu9WJDVfsTu0OC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 priorityscore=1501 mlxlogscore=999 impostorscore=0 suspectscore=0 spamscore=0 mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411040057 On 11/1/2024 5:40 PM, Will Deacon wrote: > On Wed, Oct 30, 2024 at 05:00:13PM +0530, Bibek Kumar Patro wrote: >> On 10/29/2024 6:17 PM, Will Deacon wrote: >>> On Fri, Oct 25, 2024 at 07:51:22PM +0530, Bibek Kumar Patro wrote: >>>> On 10/24/2024 6:22 PM, Will Deacon wrote: >>>>> On Tue, Oct 08, 2024 at 06:24:06PM +0530, Bibek Kumar Patro wrote: >>> If you want to gate the errata workarounds on policy, then please follow >>> what we do for the CPU: add a Kconfig option (e.g. >>> ARM_SMMU_WORKAROUND_BROKEN_CPRE) which defaults to "on" (assuming that >>> the relevant errata aren't all "rare") and update silicon-errata.rst >>> accordingly. >>> >>> Then you can choose to disable them in your .config if you're happy to >>> pick up the pieces. >> >> This seems to be a good idea to me . I am thinking of this approach based on >> your suggestion, >> i.e. we can bind the original workaround in >> arm_mmu500_reset implementation within ARM_SMMU_WORKAROUND_BROKEN_CPRE >> config (defualts to on, CPRE would be disabled) and in QCOM SoCs default it >> to off >> (when ARM_SMMU_QCOM=Y -> switch ARM_SMMU_WORKAROUND_BROKEN_CPRE=N). > > ARM_SMMU_QCOM is enabled by default, so please don't do that. People who > want to disable errata workarounds based on a hunch can do that themselves. > There's no need to try to do that automatically in Kconfig. > Okay I see, that seems better. To allow users to manually toggle the config switch for disabling errata workarounds based on their specific needs, rather than having it enabled by default. >> In silicon-errata.rst would updating ARM_SMMU_WORKAROUND_BROKEN_CPRE be okay >> , as the config names are based on erratum number. > > In this case, the Kconfig option covers a variety of errata so how about > we go with: > > ARM_SMMU_MMU_500_CPRE_ERRATA > > and then you can list all of the numbers in the "Erratum ID" column? > Ack, this name sounds self-explanatory to me. Thanks for the suggestion, I'll proceed with this name and ensure documenting the known numbers in Erratum ID column <#826419, #841119, #562869, #1047329> Thanks & regards, Bibek > Will >