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Tue, 14 Apr 2026 02:47:03 -0700 (PDT) X-Received: by 2002:a17:90a:d607:b0:35d:a90d:580e with SMTP id 98e67ed59e1d1-35e428856dfmr18244215a91.23.1776160022898; Tue, 14 Apr 2026 02:47:02 -0700 (PDT) Received: from [10.206.105.200] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35fc6e78168sm1520481a91.12.2026.04.14.02.46.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Apr 2026 02:47:02 -0700 (PDT) Message-ID: <9ac01a3a-1ce2-373d-33be-1c10853604c3@oss.qualcomm.com> Date: Tue, 14 Apr 2026 15:16:53 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 01/11] dt-bindings: media: qcom,glymur-iris: Add glymur video codec Content-Language: en-US To: Krzysztof Kozlowski Cc: Bryan O'Donoghue , Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joerg Roedel , Will Deacon , Robin Murphy , Bjorn Andersson , Konrad Dybcio , Stefan Schmidt , Hans Verkuil , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev References: <20260414-glymur-v1-0-7d3d1cf57b16@oss.qualcomm.com> <20260414-glymur-v1-1-7d3d1cf57b16@oss.qualcomm.com> <20260414-lush-reindeer-of-storm-bbe918@quoll> From: Vishnu Reddy In-Reply-To: <20260414-lush-reindeer-of-storm-bbe918@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE0MDA5MSBTYWx0ZWRfX5LHhUjxsnScF jcTtpc40XXTULZ+pPhDqVZMwV71zF46Yzpw/5xNCkizIkPnGweJNUOcqwnBOrX7iMIze+89VQZS 21DqTRSX1iQhDxnLaqHgfQ4rnNjoTTN031oY9ZV/m6HqVmYohkJcAGIF0Kop2U0ArxZNnMevYpc LaicGFmBIFHBLAYLIkqfKSw24/Du6lAsZdaB7L7VbwLioM39o4nrFT/qrOx0CrOyxTRh7gCokVv GDzpIkBIQQF27yiLBaUCx3frBESCpbLa51JBJNHNT1ONtR7WXoxNuLYqTTpyBnQSMIgy7xkO2ci 1TZy9STEbCxK1FSaZf3Q59TTiButFJXwkzCu7w0IhzdBeVqpUBKreMZMBGtT/F4J43Obz7LCjYF SaYy7L2OhagUqbLQJSsITAQtdv/8m6yFA3LyUboAyf4bAF41mxgiN4MUaMSCkTOTE9pQJumoV7h 8SlK+mYu7Ebp3Cveymw== X-Authority-Analysis: v=2.4 cv=DaYnbPtW c=1 sm=1 tr=0 ts=69de0d18 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=J1jT_auZRQXyn7_S9LoA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-GUID: Cmc7m5vmMH_a7KGv5hGlgL9YpTB6srhf X-Proofpoint-ORIG-GUID: Cmc7m5vmMH_a7KGv5hGlgL9YpTB6srhf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-14_02,2026-04-13_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 malwarescore=0 phishscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 adultscore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604140091 On 4/14/2026 12:55 PM, Krzysztof Kozlowski wrote: > On Tue, Apr 14, 2026 at 10:29:57AM +0530, Vishnu Reddy wrote: >> Add device tree binding for the Qualcomm Glymur Iris video codec. Glymur >> is a new generation of video IP that introduces a dual-core architecture. >> The second core brings its own power domain, clocks, and reset lines, >> requiring additional power domains and clocks in the power sequence. >> >> Signed-off-by: Vishnu Reddy >> --- >> .../bindings/media/qcom,glymur-iris.yaml | 220 +++++++++++++++++++++ >> include/dt-bindings/media/qcom,glymur-iris.h | 11 ++ >> 2 files changed, 231 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml b/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml >> new file mode 100644 >> index 000000000000..10ee02cd1a7d >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/media/qcom,glymur-iris.yaml >> @@ -0,0 +1,220 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/media/qcom,glymur-iris.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Glymur SoC Iris video encoder and decoder >> + >> +maintainers: >> + - Vishnu Reddy >> + >> +description: >> + The Iris video processing unit on Qualcomm Glymur SoC is a video encode and >> + decode accelerator. >> + >> +properties: >> + compatible: >> + const: qcom,glymur-iris >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 9 >> + >> + clock-names: >> + items: >> + - const: iface >> + - const: core >> + - const: vcodec0_core > iface1 goes here > core_freerun > vcodec0_core_freerun > and the rest, based on sm8750. Or which previous variant did you use as > the base? Ack, will use sm8750 as base and I'll update. Thanks for the suggestion. > >> + - const: iface_ctrl >> + - const: core_freerun >> + - const: vcodec0_core_freerun >> + - const: iface1 >> + - const: vcodec1_core >> + - const: vcodec1_core_freerun >> + >> + dma-coherent: true >> + >> + firmware-name: >> + maxItems: 1 >> + >> + interconnects: >> + maxItems: 2 >> + >> + interconnect-names: >> + items: >> + - const: cpu-cfg >> + - const: video-mem >> + >> + interrupts: >> + maxItems: 1 >> + >> + iommus: >> + maxItems: 4 >> + >> + iommu-map: >> + maxItems: 1 >> + >> + memory-region: >> + maxItems: 1 >> + >> + operating-points-v2: true >> + opp-table: >> + type: object >> + >> + power-domains: >> + maxItems: 5 >> + >> + power-domain-names: >> + items: >> + - const: venus >> + - const: vcodec0 >> + - const: mxc >> + - const: mmcx >> + - const: vcodec1 >> + >> + resets: >> + maxItems: 6 >> + >> + reset-names: >> + items: >> + - const: bus0 > bus1 > core > vcodec0_core Ack > >> + - const: bus_ctrl > >> + - const: core >> + - const: vcodec0_core >> + - const: bus1 >> + - const: vcodec1_core >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - dma-coherent >> + - interconnects >> + - interconnect-names >> + - interrupts >> + - iommus >> + - memory-region >> + - power-domains >> + - power-domain-names >> + - resets >> + - reset-names >> + >> +unevaluatedProperties: false > Use existing, most recent code as starting point. Ack, will use sm8750. > >> + >> +examples: >> + - | >> + #include >> + #include >> + #include >> + >> + video-codec@aa00000 { >> + compatible = "qcom,glymur-iris"; >> + reg = <0x0aa00000 0xf0000>; >> + >> + clocks = <&gcc_video_axi0_clk>, >> + <&videocc_mvs0c_clk>, >> + <&videocc_mvs0_clk>, >> + <&gcc_video_axi0c_clk>, >> + <&videocc_mvs0c_freerun_clk>, >> + <&videocc_mvs0_freerun_clk>, >> + <&gcc_video_axi1_clk>, >> + <&videocc_mvs1_clk>, >> + <&videocc_mvs1_freerun_clk>; >> + clock-names = "iface", >> + "core", >> + "vcodec0_core", >> + "iface_ctrl", >> + "core_freerun", >> + "vcodec0_core_freerun", >> + "iface1", >> + "vcodec1_core", >> + "vcodec1_core_freerun"; >> + >> + dma-coherent; >> + >> + interconnects = <&hsc_noc_master_appss_proc &config_noc_slave_venus_cfg>, >> + <&mmss_noc_master_video &mc_virt_slave_ebi1>; >> + interconnect-names = "cpu-cfg", >> + "video-mem"; >> + >> + interrupts = ; >> + >> + iommus = <&apps_smmu 0x1940 0x0>, >> + <&apps_smmu 0x1943 0x0>, >> + <&apps_smmu 0x1944 0x0>, >> + <&apps_smmu 0x19e0 0x0>; >> + >> + iommu-map = ; >> + >> + memory-region = <&video_mem>; >> + >> + operating-points-v2 = <&iris_opp_table>; >> + >> + power-domains = <&videocc_mvs0c_gdsc>, >> + <&videocc_mvs0_gdsc>, >> + <&rpmhpd RPMHPD_MXC>, >> + <&rpmhpd RPMHPD_MMCX>, >> + <&videocc_mvs1_gdsc>; >> + power-domain-names = "venus", >> + "vcodec0", >> + "mxc", >> + "mmcx", >> + "vcodec1"; >> + >> + resets = <&gcc_video_axi0_clk_ares>, >> + <&gcc_video_axi0c_clk_ares>, >> + <&videocc_mvs0c_freerun_clk_ares>, >> + <&videocc_mvs0_freerun_clk_ares>, >> + <&gcc_video_axi1_clk_ares>, >> + <&videocc_mvs1_freerun_clk_ares>; >> + reset-names = "bus0", >> + "bus_ctrl", >> + "core", >> + "vcodec0_core", >> + "bus1", >> + "vcodec1_core"; >> + >> + iris_opp_table: opp-table { >> + compatible = "operating-points-v2"; >> + >> + opp-240000000 { >> + opp-hz = /bits/ 64 <240000000 240000000 360000000>; >> + required-opps = <&rpmhpd_opp_svs>, >> + <&rpmhpd_opp_low_svs>; >> + }; >> + >> + opp-338000000 { >> + opp-hz = /bits/ 64 <338000000 338000000 507000000>; >> + required-opps = <&rpmhpd_opp_svs>, >> + <&rpmhpd_opp_svs>; >> + }; >> + >> + opp-366000000 { >> + opp-hz = /bits/ 64 <366000000 366000000 549000000>; >> + required-opps = <&rpmhpd_opp_svs_l1>, >> + <&rpmhpd_opp_svs_l1>; >> + }; >> + >> + opp-444000000 { >> + opp-hz = /bits/ 64 <444000000 444000000 666000000>; >> + required-opps = <&rpmhpd_opp_svs_l1>, >> + <&rpmhpd_opp_nom>; >> + }; >> + >> + opp-533333334 { >> + opp-hz = /bits/ 64 <533333334 533333334 800000000>; >> + required-opps = <&rpmhpd_opp_svs_l1>, >> + <&rpmhpd_opp_turbo>; >> + }; >> + >> + opp-655000000 { >> + opp-hz = /bits/ 64 <655000000 655000000 982000000>; >> + required-opps = <&rpmhpd_opp_nom>, >> + <&rpmhpd_opp_turbo_l1>; >> + }; >> + }; >> + }; >> diff --git a/include/dt-bindings/media/qcom,glymur-iris.h b/include/dt-bindings/media/qcom,glymur-iris.h >> new file mode 100644 >> index 000000000000..5766db0b9247 >> --- /dev/null >> +++ b/include/dt-bindings/media/qcom,glymur-iris.h >> @@ -0,0 +1,11 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + */ >> + >> +#ifndef _DT_BINDINGS_MEDIA_QCOM_GLYMUR_IRIS_H_ >> +#define _DT_BINDINGS_MEDIA_QCOM_GLYMUR_IRIS_H_ >> + >> +#define IRIS_FIRMWARE 0 > For what is this define? IOMMU map? Binding is quiet about it, so > probably this should have some prefix to make it obvious. > IOMMU_? DEV_? What does this define express? It's a function ID. I'll add prefix like this IOMMU_FID_IRIS_FIRMWARE. Thanks, Vishnu Reddy > > Best regards, > Krzysztof >