From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f202.google.com (mail-pl1-f202.google.com [209.85.214.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57F72182 for ; Fri, 3 Jan 2025 02:04:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.202 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735869889; cv=none; b=FNDkKvwr8F9vgYGi5Ed7EjKuSeGHYiGFlVoeQ52R81aWj761PI346myKCdbiJCkVzjrdtI+ugxrsXRDvS0YwovhI8FW1CobQ1gNLk01cOwWOys6elx1NZ5Fs1EyzWDj84jLewgIB0KWfxTmV0ApKVGX/zgJ2MbbkK6eVprEaBvk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735869889; c=relaxed/simple; bh=cXAi7bBYPwuN2p39neBGKD3ONxci6buooHsHLy2tIIg=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=Jr3i1ofACrMQpqMqtq43zgypOubvE1LJBFL1U38OrN/fxcEzx2e+nBSgG/68h5D4n7IQo+ph08xq61JRh1e5nI1NAJthCmeSHm3PuvgqMryzdhu38gkkaeoWngsTK/gtOoJHUklM/1NVwF7Uxl+/GIpgkqSVEfFtjs6qfwTWNKM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--yepeilin.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=untBa1oM; arc=none smtp.client-ip=209.85.214.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--yepeilin.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="untBa1oM" Received: by mail-pl1-f202.google.com with SMTP id d9443c01a7336-2162f80040aso150182955ad.1 for ; Thu, 02 Jan 2025 18:04:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1735869887; x=1736474687; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=4UjZolz5E/NeRAD/hPdz8QuR6mdLUg8da+IaKtziAes=; b=untBa1oMuY7JL5SuIWDgaSJYG6RBtUikHu7gW1fqXJlXJs0OcIwRRAOgjEk/8sb/7H GSF5Uw4gTXZU1A+tfdrw8wzY/eUdVRQhBwiSb3dL48fUlXjFV79sqfi4klaOQIv94eUI dEgDA/TOnvlRyQioOZbItPSkd9if+ipj88BgjZiUAcTtnu1kZXkYlg1+EZVekiFo/5TR nOfHeG0ktH6+lXotamwDnHeejJIp17ci5CZgJaTlzGUPpzcUpMA/agRyYdv6rZXuY1nl OgZDI7u785TRHKR1xj3e2dVy7SsYfMmjt7SeXUyWN0kmYSI/pZGlx3ediL9gmBwXpYtT ot8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735869887; x=1736474687; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=4UjZolz5E/NeRAD/hPdz8QuR6mdLUg8da+IaKtziAes=; b=TS65xqbD7EeRU9ZiCtrJuG4Rv8q5dPLgIGmgVjeq53zEK+hz2dItefk8u+D8UbnTZ/ BpY8SPgw7zkY62cOhynyVbKG5DT1mixDoPPboGLdu4G63kJvYYWZj9RfM9nHf8DYSRZI iyOyaPdjoHIowAEKRYaNnGevijPajyN5Q/c4Fge1bOAyPapxUIQ0/HvMXQiCdJEJ+XEx 6wtgt1qosiHBok7KeDDewa2jHopsz7lIPxX/sxBbNUuu8+6KTBq2KVGgmPWi7sLkXgd+ 7CNNJZMbEfYRa0B5sk2/WBLF/z0qJpvPcz0ivLVm0aRgfvIb2/AOKBykRZyn8PuwxQrx iG+Q== X-Forwarded-Encrypted: i=1; AJvYcCXzkxdy6/NikAqBzGjLrKjvBAaF0DbKkG7vFurKna9lEHOIKpXTRQDkVoWAYuzgkbHwHiod2lx6NjWOdt8=@vger.kernel.org X-Gm-Message-State: AOJu0YyMi6/V3EQUh5nO5SRXnN0gzlYErhqz0L9vb9yTiwuzm5qVD7cm V9qnP7SX08aXU9L+80j/a1dADxgONpCkhYWIHIvjgVb1g3w2vORUgdhH4hx7nO3Izb4ZBbWCZ4G xyal8OjIQmg== X-Google-Smtp-Source: AGHT+IFn9sa16Ybx9bMnT3j8/6v7ZyNcSwDP48OOodsufyBW3mKo0tvoS5jljQA1jigXnWx+/SHMhWvEv0+uPw== X-Received: from pfbc2.prod.google.com ([2002:a05:6a00:ad02:b0:725:eeaa:65e2]) (user=yepeilin job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a21:7896:b0:1e0:d9a0:4ff7 with SMTP id adf61e73a8af0-1e5e08011d6mr82625682637.32.1735869887482; Thu, 02 Jan 2025 18:04:47 -0800 (PST) Date: Fri, 3 Jan 2025 02:04:18 +0000 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Message-ID: <9ad3034a62361d91a99af24efa03f48c4c9e13ea.1735868489.git.yepeilin@google.com> Subject: [PATCH bpf-next v2 3/3] bpf, arm64: Emit A64_{ADD,SUB}_I when possible in emit_{lse,ll_sc}_atomic() From: Peilin Ye To: bpf@vger.kernel.org Cc: Peilin Ye , Xu Kuohai , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , Song Liu , Yonghong Song , John Fastabend , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , Puranjay Mohan , Catalin Marinas , Will Deacon , Josh Don , Barret Rhoden , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Currently in emit_{lse,ll_sc}_atomic(), if there is an offset, we add it to the base address by doing e.g.: if (off) { emit_a64_mov_i(1, tmp, off, ctx); emit(A64_ADD(1, tmp, tmp, dst), ctx); ... As pointed out by Xu, we can use emit_a64_add_i() (added in the previous patch) instead, which tries to combine the above into a single A64_ADD_I or A64_SUB_I when possible. Suggested-by: Xu Kuohai Signed-off-by: Peilin Ye --- change in v2: * move the logic into a helper (added in v2 2/3) and use it (Xu) v1: https://lore.kernel.org/bpf/953c7241e82496cb7a8b5a8724028ad646cd0896.1735342016.git.yepeilin@google.com/ arch/arm64/net/bpf_jit_comp.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c index 8ee9528d8795..8446848edddb 100644 --- a/arch/arm64/net/bpf_jit_comp.c +++ b/arch/arm64/net/bpf_jit_comp.c @@ -662,8 +662,7 @@ static int emit_lse_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx) u8 reg = dst; if (off) { - emit_a64_mov_i(1, tmp, off, ctx); - emit(A64_ADD(1, tmp, tmp, dst), ctx); + emit_a64_add_i(1, tmp, reg, tmp, off, ctx); reg = tmp; } if (arena) { @@ -734,7 +733,7 @@ static int emit_ll_sc_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx) const s32 imm = insn->imm; const s16 off = insn->off; const bool isdw = BPF_SIZE(code) == BPF_DW; - u8 reg; + u8 reg = dst; s32 jmp_offset; if (BPF_MODE(code) == BPF_PROBE_ATOMIC) { @@ -743,11 +742,8 @@ static int emit_ll_sc_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx) return -EINVAL; } - if (!off) { - reg = dst; - } else { - emit_a64_mov_i(1, tmp, off, ctx); - emit(A64_ADD(1, tmp, tmp, dst), ctx); + if (off) { + emit_a64_add_i(1, tmp, reg, tmp, off, ctx); reg = tmp; } -- 2.47.1.613.gc27f4b7a9f-goog