From: James Morse <james.morse@arm.com>
To: Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
D Scott Phillips OS <scott@os.amperecomputing.com>,
carl@os.amperecomputing.com, lcherian@marvell.com,
bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com,
baolin.wang@linux.alibaba.com,
Jamie Iles <quic_jiles@quicinc.com>,
Xin Hao <xhao@linux.alibaba.com>,
peternewman@google.com, dfustini@baylibre.com,
amitsinght@marvell.com, David Hildenbrand <david@redhat.com>,
Dave Martin <dave.martin@arm.com>, Koba Ko <kobak@nvidia.com>,
Shanker Donthineni <sdonthineni@nvidia.com>,
fenghuay@nvidia.com, baisheng.gao@unisoc.com,
Rob Herring <robh@kernel.org>,
Rohit Mathew <rohit.mathew@arm.com>,
Rafael Wysocki <rafael@kernel.org>, Len Brown <lenb@kernel.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Hanjun Guo <guohanjun@huawei.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Danilo Krummrich <dakr@kernel.org>,
Ben Horgan <ben.horgan@arm.com>
Subject: Re: [PATCH v2 08/29] arm_mpam: Add the class and component structures for firmware described ris
Date: Fri, 26 Sep 2025 18:52:27 +0100 [thread overview]
Message-ID: <9ad4ae7a-2151-4d60-8303-87f38d7695d8@arm.com> (raw)
In-Reply-To: <20250911152244.000047db@huawei.com>
Hi Jonathan,
On 11/09/2025 15:22, Jonathan Cameron wrote:
> On Wed, 10 Sep 2025 20:42:48 +0000
> James Morse <james.morse@arm.com> wrote:
>
>> An MSC is a container of resources, each identified by their RIS index.
>> Some RIS are described by firmware to provide their position in the system.
>> Others are discovered when the driver probes the hardware.
>>
>> To configure a resource it needs to be found by its class, e.g. 'L2'.
>> There are two kinds of grouping, a class is a set of components, which
>> are visible to user-space as there are likely to be multiple instances
>> of the L2 cache. (e.g. one per cluster or package)
>>
>> Add support for creating and destroying structures to allow a hierarchy
>> of resources to be created.
> Various minor things inline.
>
> Biggest is I think maybe just moving to explicit reference counts
> rather than using the empty list for that might end up easier to
> read. Mostly because everyone knows what a kref_put() is about.
>
> Obviously a bit pointless in practice, but I prefer not to think too
> hard.
I've spent a while playing with this - its the wrong shape for what is going on here.
This builds that tree structure during driver probing. (and adds 'unknown' entries to it
when poking the hardware). But by the time mpam_enable() is called - its basically
read-only. After that point the only 'write' that will happen is the error interrupt which
just free's everything. The deferred free from SRCU makes that safe.
(some of this will be clearer when I add the block comment about the 'phases' the driver
goes through that Dave asked for)
Making it 'reference counted' instead is pointless because callers would be get/put-ing
references - but the structure is basically read-only, and not going to go away while the
SRCU reference is held.
One of the things reference counting breaks is the devm_kzalloc() usage - as an error from
the driver probe function will free all of those regions, regardless of what the reference
count says.
I'll look to rename the existing 'get' functions so folk don't immediatly think of get/put!
('find' doesn't really cut it as it does the allocation if it doesn't 'find' anything)
>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
>> index efc4738e3b4d..c7f4981b3545 100644
>> --- a/drivers/resctrl/mpam_devices.c
>> +++ b/drivers/resctrl/mpam_devices.c
>> @@ -18,7 +18,6 @@
>> #include <linux/printk.h>
>> #include <linux/slab.h>
>> #include <linux/spinlock.h>
>> -#include <linux/srcu.h>
>
> Why does this include no longer make sense?
It gets moved to mpam_internal.h because of the srcu_struct declaration that is needed for
callers in the resctrl code to walk the classes list.
I can add it to the mpam_internal.h header from the beginning.
>> @@ -31,7 +30,7 @@
>> static DEFINE_MUTEX(mpam_list_lock);
>> static LIST_HEAD(mpam_all_msc);
>>
>> -static struct srcu_struct mpam_srcu;
>> +struct srcu_struct mpam_srcu;
>
> ...
>
>> +/* List of all objects that can be free()d after synchronise_srcu() */
>> +static LLIST_HEAD(mpam_garbage);
>> +
>> +#define init_garbage(x) init_llist_node(&(x)->garbage.llist)
>
> Whilst this obviously works, I'd rather pass garbage to init_garbage
> instead of the containing structure (where type varies)
Sure,
>> +static struct mpam_component *
>> +mpam_component_get(struct mpam_class *class, int id)
>> +{
>> + struct mpam_component *comp;
>> +
>> + lockdep_assert_held(&mpam_list_lock);
>> +
>> + list_for_each_entry(comp, &class->components, class_list) {
>> + if (comp->comp_id == id)
>> + return comp;
>> + }
>> +
>> + return mpam_component_alloc(class, id);
>> +}
>
>> +static struct mpam_class *
>> +mpam_class_get(u8 level_idx, enum mpam_class_types type)
>> +{
>> + bool found = false;
>> + struct mpam_class *class;
>> +
>> + lockdep_assert_held(&mpam_list_lock);
>> +
>> + list_for_each_entry(class, &mpam_classes, classes_list) {
>> + if (class->type == type && class->level == level_idx) {
>> + found = true;
>> + break;
>> + }
>> + }
>> +
>> + if (found)
>> + return class;
>
> Maybe this gets more complex later, but if it doesn't, just return class where you set
> found above. Matches with pattern used in mpam_component_get() above.
Yup, this is a relic of more complex locking.
>> +
>> + return mpam_class_alloc(level_idx, type);
>> +}
>
>
>> +static void mpam_ris_destroy(struct mpam_msc_ris *ris)
>> +{
>> + struct mpam_vmsc *vmsc = ris->vmsc;
>> + struct mpam_msc *msc = vmsc->msc;
>> + struct platform_device *pdev = msc->pdev;
>> + struct mpam_component *comp = vmsc->comp;
>> + struct mpam_class *class = comp->class;
>> +
>> + lockdep_assert_held(&mpam_list_lock);
>> +
>> + /*
>> + * It is assumed affinities don't overlap. If they do the class becomes
>> + * unusable immediately.
>> + */
>> + cpumask_andnot(&comp->affinity, &comp->affinity, &ris->affinity);
>> + cpumask_andnot(&class->affinity, &class->affinity, &ris->affinity);
>> + clear_bit(ris->ris_idx, &msc->ris_idxs);
>> + list_del_rcu(&ris->vmsc_list);
>> + list_del_rcu(&ris->msc_list);
>> + add_to_garbage(ris);
>> + ris->garbage.pdev = pdev;
>> +
>> + if (list_empty(&vmsc->ris))
> See below. I think it is worth using an explicit reference count even
> though that will only reach zero when the list is empty.
By the time eveything is probed, its an almost entirely read-only structure. The only
writer will free absolutely everything. Changing this to structure-by-structure reference
counting will cause busy-work for readers, who are already protected by SRCU.
>> + mpam_vmsc_destroy(vmsc);
>> +}
>
>
>> +static int mpam_ris_create_locked(struct mpam_msc *msc, u8 ris_idx,
>> + enum mpam_class_types type, u8 class_id,
>> + int component_id)
>> +{
>> + int err;
>> + struct mpam_vmsc *vmsc;
>> + struct mpam_msc_ris *ris;
>> + struct mpam_class *class;
>> + struct mpam_component *comp;
>> +
>> + lockdep_assert_held(&mpam_list_lock);
>> +
>> + if (ris_idx > MPAM_MSC_MAX_NUM_RIS)
>> + return -EINVAL;
>> +
>> + if (test_and_set_bit(ris_idx, &msc->ris_idxs))
>> + return -EBUSY;
>> +
>> + ris = devm_kzalloc(&msc->pdev->dev, sizeof(*ris), GFP_KERNEL);
>> + if (!ris)
>> + return -ENOMEM;
>> + init_garbage(ris);
>> +
>> + class = mpam_class_get(class_id, type);
>> + if (IS_ERR(class))
>> + return PTR_ERR(class);
>> +
>> + comp = mpam_component_get(class, component_id);
>> + if (IS_ERR(comp)) {
>> + if (list_empty(&class->components))
>> + mpam_class_destroy(class);
>
> Maybe just reference count the classes with a kref and do a put here?
>
>> + return PTR_ERR(comp);
>> + }
>> +
>> + vmsc = mpam_vmsc_get(comp, msc);
>> + if (IS_ERR(vmsc)) {
>> + if (list_empty(&comp->vmsc))
>> + mpam_comp_destroy(comp);
> Similar to classes I wonder if simple reference counting is cleaner.
(I spent a few days on it - its prettier, but more work for things like the resctrl code
to get/put references when SRCU already has the write side covered)
>> + return PTR_ERR(vmsc);
>> + }
>> +
>> + err = mpam_ris_get_affinity(msc, &ris->affinity, type, class, comp);
>> + if (err) {
>> + if (list_empty(&vmsc->ris))
>
> and here as well.
>
>> + mpam_vmsc_destroy(vmsc);
>> + return err;
>> + }
>> +
>> + ris->ris_idx = ris_idx;
>> + INIT_LIST_HEAD_RCU(&ris->vmsc_list);
>> + ris->vmsc = vmsc;
>> +
>> + cpumask_or(&comp->affinity, &comp->affinity, &ris->affinity);
>> + cpumask_or(&class->affinity, &class->affinity, &ris->affinity);
>> + list_add_rcu(&ris->vmsc_list, &vmsc->ris);
>> +
>> + return 0;
>> +}
>
>> /*
>> * An MSC can control traffic from a set of CPUs, but may only be accessible
>> * from a (hopefully wider) set of CPUs. The common reason for this is power
>> @@ -74,10 +469,10 @@ static void mpam_msc_drv_remove(struct platform_device *pdev)
>> return;
>>
>> mutex_lock(&mpam_list_lock);
>> - platform_set_drvdata(pdev, NULL);
>> - list_del_rcu(&msc->all_msc_list);
>> - synchronize_srcu(&mpam_srcu);
>> + mpam_msc_destroy(msc);
>
> I'd suggest introducing mpam_msc_destroy() in the earlier patch. Doesn't make a huge
> difference but 2 out of 3 things removed here would be untouched if you do that.
Sure. This is remnant of a patch from Carl that moved all this around.
Thanks,
James
next prev parent reply other threads:[~2025-09-26 17:52 UTC|newest]
Thread overview: 200+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-10 20:42 [PATCH v2 00/29] arm_mpam: Add basic mpam driver James Morse
2025-09-10 20:42 ` [PATCH v2 01/29] ACPI / PPTT: Add a helper to fill a cpumask from a processor container James Morse
2025-09-11 10:43 ` Jonathan Cameron
2025-09-11 10:48 ` Jonathan Cameron
2025-09-19 16:10 ` James Morse
2025-09-25 9:32 ` Stanimir Varbanov
2025-10-10 16:54 ` James Morse
2025-10-02 3:35 ` Fenghua Yu
2025-10-10 16:54 ` James Morse
2025-10-03 0:15 ` Gavin Shan
2025-10-10 16:55 ` James Morse
2025-09-10 20:42 ` [PATCH v2 02/29] ACPI / PPTT: Stop acpi_count_levels() expecting callers to clear levels James Morse
2025-09-11 10:46 ` Jonathan Cameron
2025-09-19 16:10 ` James Morse
2025-09-11 14:08 ` Ben Horgan
2025-09-19 16:10 ` James Morse
2025-10-02 3:55 ` Fenghua Yu
2025-10-10 16:55 ` James Morse
2025-10-03 0:17 ` Gavin Shan
2025-09-10 20:42 ` [PATCH v2 03/29] ACPI / PPTT: Find cache level by cache-id James Morse
2025-09-11 10:59 ` Jonathan Cameron
2025-09-19 16:10 ` James Morse
2025-09-11 15:27 ` Lorenzo Pieralisi
2025-09-19 16:10 ` James Morse
2025-10-02 4:30 ` Fenghua Yu
2025-10-10 16:55 ` James Morse
2025-10-03 0:23 ` Gavin Shan
2025-09-10 20:42 ` [PATCH v2 04/29] ACPI / PPTT: Add a helper to fill a cpumask from a cache_id James Morse
2025-09-11 11:06 ` Jonathan Cameron
2025-09-19 16:10 ` James Morse
2025-10-02 5:03 ` Fenghua Yu
2025-10-10 16:55 ` James Morse
2025-09-10 20:42 ` [PATCH v2 05/29] arm64: kconfig: Add Kconfig entry for MPAM James Morse
2025-09-12 10:14 ` Ben Horgan
2025-10-02 5:06 ` Fenghua Yu
2025-10-10 16:55 ` James Morse
2025-10-03 0:32 ` Gavin Shan
2025-10-10 16:55 ` James Morse
2025-09-10 20:42 ` [PATCH v2 06/29] ACPI / MPAM: Parse the MPAM table James Morse
2025-09-11 13:17 ` Jonathan Cameron
2025-09-19 16:11 ` James Morse
2025-09-26 14:48 ` Jonathan Cameron
2025-10-17 18:50 ` James Morse
2025-09-11 14:56 ` Lorenzo Pieralisi
2025-09-19 16:11 ` James Morse
2025-09-16 13:17 ` [PATCH] arm_mpam: Try reading again if MPAM instance returns not ready Zeng Heng
2025-09-19 16:11 ` James Morse
2025-09-20 10:14 ` Zeng Heng
2025-10-02 3:21 ` [PATCH v2 06/29] ACPI / MPAM: Parse the MPAM table Fenghua Yu
2025-10-17 18:50 ` James Morse
2025-10-03 0:58 ` Gavin Shan
2025-10-17 18:51 ` James Morse
2025-09-10 20:42 ` [PATCH v2 07/29] arm_mpam: Add probe/remove for mpam msc driver and kbuild boiler plate James Morse
2025-09-11 13:35 ` Jonathan Cameron
2025-09-23 16:41 ` James Morse
2025-09-26 14:55 ` Jonathan Cameron
2025-10-17 18:51 ` James Morse
2025-09-17 11:03 ` Ben Horgan
2025-09-29 17:44 ` James Morse
2025-10-03 3:53 ` Gavin Shan
2025-10-17 18:51 ` James Morse
2025-09-10 20:42 ` [PATCH v2 08/29] arm_mpam: Add the class and component structures for firmware described ris James Morse
2025-09-11 14:22 ` Jonathan Cameron
2025-09-26 17:52 ` James Morse [this message]
2025-09-11 16:30 ` Markus Elfring
2025-09-26 17:52 ` James Morse
2025-09-26 18:15 ` Markus Elfring
2025-10-17 18:51 ` James Morse
2025-10-03 16:54 ` Fenghua Yu
2025-10-17 18:51 ` James Morse
2025-10-06 23:13 ` Gavin Shan
2025-10-17 18:51 ` James Morse
2025-09-10 20:42 ` [PATCH v2 09/29] arm_mpam: Add MPAM MSC register layout definitions James Morse
2025-09-11 15:00 ` Jonathan Cameron
2025-10-17 18:53 ` James Morse
2025-09-12 7:33 ` Markus Elfring
2025-10-06 23:25 ` Gavin Shan
2025-09-10 20:42 ` [PATCH v2 10/29] arm_mpam: Add cpuhp callbacks to probe MSC hardware James Morse
2025-09-11 15:07 ` Jonathan Cameron
2025-09-29 17:44 ` James Morse
2025-09-12 10:42 ` Ben Horgan
2025-09-29 17:44 ` James Morse
2025-10-03 17:56 ` Fenghua Yu
2025-10-06 23:42 ` Gavin Shan
2025-09-10 20:42 ` [PATCH v2 11/29] arm_mpam: Probe hardware to find the supported partid/pmg values James Morse
2025-09-11 15:18 ` Jonathan Cameron
2025-09-29 17:44 ` James Morse
2025-09-12 11:11 ` Ben Horgan
2025-09-29 17:44 ` James Morse
2025-10-03 18:58 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 12/29] arm_mpam: Add helpers for managing the locking around the mon_sel registers James Morse
2025-09-11 15:24 ` Jonathan Cameron
2025-09-29 17:44 ` James Morse
2025-09-11 15:31 ` Ben Horgan
2025-09-29 17:44 ` James Morse
2025-10-05 0:09 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 13/29] arm_mpam: Probe the hardware features resctrl supports James Morse
2025-09-11 15:29 ` Jonathan Cameron
2025-09-29 17:45 ` James Morse
2025-09-11 15:37 ` Ben Horgan
2025-09-29 17:45 ` James Morse
2025-09-30 13:32 ` Ben Horgan
2025-10-05 0:53 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 14/29] arm_mpam: Merge supported features during mpam_enable() into mpam_class James Morse
2025-09-12 11:49 ` Jonathan Cameron
2025-09-29 17:45 ` James Morse
2025-10-05 1:28 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 15/29] arm_mpam: Reset MSC controls from cpu hp callbacks James Morse
2025-09-12 11:25 ` Ben Horgan
2025-09-12 14:52 ` Ben Horgan
2025-09-30 17:06 ` James Morse
2025-09-30 17:06 ` James Morse
2025-09-12 11:55 ` Jonathan Cameron
2025-09-30 17:06 ` James Morse
2025-09-30 2:51 ` Shaopeng Tan (Fujitsu)
2025-10-01 9:51 ` James Morse
[not found] ` <1f084a23-7211-4291-99b6-7f5192fb9096@nvidia.com>
2025-10-17 18:50 ` James Morse
2025-09-10 20:42 ` [PATCH v2 16/29] arm_mpam: Add a helper to touch an MSC from any CPU James Morse
2025-09-12 11:57 ` Jonathan Cameron
2025-10-01 9:50 ` James Morse
2025-10-05 21:08 ` Fenghua Yu
2025-09-10 20:42 ` [PATCH v2 17/29] arm_mpam: Extend reset logic to allow devices to be reset any time James Morse
2025-09-12 11:42 ` Ben Horgan
2025-10-02 18:02 ` James Morse
2025-09-12 12:02 ` Jonathan Cameron
2025-09-30 17:06 ` James Morse
2025-09-25 7:16 ` Fenghua Yu
2025-10-02 18:02 ` James Morse
2025-09-10 20:42 ` [PATCH v2 18/29] arm_mpam: Register and enable IRQs James Morse
2025-09-12 12:12 ` Jonathan Cameron
2025-10-02 18:02 ` James Morse
2025-09-12 14:40 ` Ben Horgan
2025-10-02 18:03 ` James Morse
2025-09-12 15:22 ` Dave Martin
2025-10-03 18:02 ` James Morse
2025-09-25 6:33 ` Fenghua Yu
2025-10-03 18:03 ` James Morse
2025-09-10 20:42 ` [PATCH v2 19/29] arm_mpam: Use a static key to indicate when mpam is enabled James Morse
2025-09-12 12:13 ` Jonathan Cameron
2025-10-03 18:03 ` James Morse
2025-09-12 14:42 ` Ben Horgan
2025-10-03 18:03 ` James Morse
2025-09-26 2:31 ` Fenghua Yu
2025-10-03 18:04 ` James Morse
2025-09-10 20:43 ` [PATCH v2 20/29] arm_mpam: Allow configuration to be applied and restored during cpu online James Morse
2025-09-12 12:22 ` Jonathan Cameron
2025-10-07 11:11 ` James Morse
2025-09-12 15:00 ` Ben Horgan
2025-09-25 6:53 ` Fenghua Yu
2025-10-03 18:04 ` James Morse
2025-09-10 20:43 ` [PATCH v2 21/29] arm_mpam: Probe and reset the rest of the features James Morse
2025-09-12 13:07 ` Jonathan Cameron
2025-10-03 18:05 ` James Morse
2025-09-10 20:43 ` [PATCH v2 22/29] arm_mpam: Add helpers to allocate monitors James Morse
2025-09-12 13:11 ` Jonathan Cameron
2025-10-06 14:57 ` James Morse
2025-10-06 15:56 ` James Morse
2025-09-10 20:43 ` [PATCH v2 23/29] arm_mpam: Add mpam_msmon_read() to read monitor value James Morse
2025-09-11 15:46 ` Ben Horgan
2025-09-12 15:08 ` Ben Horgan
2025-10-06 16:00 ` James Morse
2025-10-06 15:59 ` James Morse
2025-09-12 13:21 ` Jonathan Cameron
2025-10-09 17:48 ` James Morse
2025-09-25 2:30 ` Fenghua Yu
2025-10-09 17:48 ` James Morse
2025-09-10 20:43 ` [PATCH v2 24/29] arm_mpam: Track bandwidth counter state for overflow and power management James Morse
2025-09-12 13:24 ` Jonathan Cameron
2025-10-09 17:48 ` James Morse
2025-09-12 15:55 ` Ben Horgan
2025-10-13 16:29 ` James Morse
2025-09-10 20:43 ` [PATCH v2 25/29] arm_mpam: Probe for long/lwd mbwu counters James Morse
2025-09-12 13:27 ` Jonathan Cameron
2025-10-09 17:48 ` James Morse
2025-09-10 20:43 ` [PATCH v2 26/29] arm_mpam: Use long MBWU counters if supported James Morse
2025-09-12 13:29 ` Jonathan Cameron
2025-10-10 16:53 ` James Morse
2025-09-26 4:51 ` Fenghua Yu
2025-09-10 20:43 ` [PATCH v2 27/29] arm_mpam: Add helper to reset saved mbwu state James Morse
2025-09-12 13:33 ` Jonathan Cameron
2025-10-10 16:53 ` James Morse
2025-09-18 2:35 ` Shaopeng Tan (Fujitsu)
2025-10-10 16:53 ` James Morse
2025-09-26 4:11 ` Fenghua Yu
2025-10-10 16:53 ` James Morse
2025-09-10 20:43 ` [PATCH v2 28/29] arm_mpam: Add kunit test for bitmap reset James Morse
2025-09-12 13:37 ` Jonathan Cameron
2025-10-10 16:53 ` James Morse
2025-09-12 16:06 ` Ben Horgan
2025-10-10 16:53 ` James Morse
2025-09-26 2:35 ` Fenghua Yu
2025-10-10 16:53 ` James Morse
2025-09-10 20:43 ` [PATCH v2 29/29] arm_mpam: Add kunit tests for props_mismatch() James Morse
2025-09-12 13:41 ` Jonathan Cameron
2025-10-10 16:54 ` James Morse
2025-09-12 16:01 ` Ben Horgan
2025-10-10 16:54 ` James Morse
2025-09-26 2:36 ` Fenghua Yu
2025-10-10 16:54 ` James Morse
2025-09-25 7:18 ` [PATCH v2 00/29] arm_mpam: Add basic mpam driver Fenghua Yu
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