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Subject: Re: [PATCH] drm/ttm: Make sure BOs being swapped out are cacheable
To: Sinclair Yeh <syeh@vmware.com>,
        =?UTF-8?Q?Christian_K=c3=b6nig?= <christian.koenig@amd.com>
Cc: Thomas Hellstrom <thellstrom@vmware.com>,
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References: <20170125082131.25544-1-michel@daenzer.net>
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 <20170126004632.GA3457@vmware.com>
From: =?UTF-8?Q?Michel_D=c3=a4nzer?= <michel@daenzer.net>
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Date: Fri, 27 Jan 2017 11:29:11 +0900
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On 26/01/17 09:46 AM, Sinclair Yeh wrote:
> On Wed, Jan 25, 2017 at 10:49:33AM +0100, Christian König wrote:
>> Am 25.01.2017 um 10:25 schrieb Thomas Hellstrom:
>>> On 01/25/2017 09:21 AM, Michel Dänzer wrote:
>>>> From: Michel Dänzer <michel.daenzer@amd.com>
>>>>
>>>> The current caching state may not be tt_cached, even though the
>>>> placement contains TTM_PL_FLAG_CACHED, because placement can contain
>>>> multiple caching flags. Trying to swap out such a BO would trip up the
>>>>
>>>> 	BUG_ON(ttm->caching_state != tt_cached);
>>>>
>>>> in ttm_tt_swapout.
>>>>
>>>> Cc: stable@vger.kernel.org
>>>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
>>> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
>>
>> Reviewed-by: Christian König <christian.koenig@amd.com>.
> 
> Reviewed-by: Sinclair Yeh <syeh@vmware.com>

Thanks for the reviews! Via which tree should we merge this?


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer