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From: Zong Li <zong@andestech.com>
To: <palmer@sifive.com>, <albert@sifive.com>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<zong@andestech.com>, <zongbox@gmail.com>
Cc: <greentime@andestech.com>
Subject: [PATCH v2 04/11] RISC-V: Support CALL relocation type in kernel module
Date: Thu, 15 Mar 2018 16:50:44 +0800	[thread overview]
Message-ID: <9b02b60c51c87f144e7e24aefd9754e32883ca8a.1521103172.git.zong@andestech.com> (raw)
In-Reply-To: <cover.1521103167.git.zong@andestech.com>

Signed-off-by: Zong Li <zong@andestech.com>
---
 arch/riscv/kernel/module.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c
index be717bd7cea7..3f2730840c25 100644
--- a/arch/riscv/kernel/module.c
+++ b/arch/riscv/kernel/module.c
@@ -141,6 +141,27 @@ static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 	return 0;
 }
 
+static int apply_r_riscv_call_rela(struct module *me, u32 *location,
+				   Elf_Addr v)
+{
+	s64 offset = (void *)v - (void *)location;
+	s32 fill_v = offset;
+	u32 hi20, lo12;
+
+	if (offset != fill_v) {
+		pr_err(
+		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
+		  me->name, v, location);
+		return -EINVAL;
+	}
+
+	hi20 = (offset + 0x800) & 0xfffff000;
+	lo12 = (offset - hi20) & 0xfff;
+	*location = (*location & 0xfff) | hi20;
+	*(location + 1) = (*(location + 1) & 0xfffff) | (lo12 << 20);
+	return 0;
+}
+
 static int apply_r_riscv_relax_rela(struct module *me, u32 *location,
 				    Elf_Addr v)
 {
@@ -157,6 +178,7 @@ static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
 	[R_RISCV_PCREL_LO12_S]		= apply_r_riscv_pcrel_lo12_s_rela,
 	[R_RISCV_GOT_HI20]		= apply_r_riscv_got_hi20_rela,
 	[R_RISCV_CALL_PLT]		= apply_r_riscv_call_plt_rela,
+	[R_RISCV_CALL]			= apply_r_riscv_call_rela,
 	[R_RISCV_RELAX]			= apply_r_riscv_relax_rela,
 };
 
-- 
2.16.1

  parent reply	other threads:[~2018-03-15  8:51 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-15  8:50 [PATCH v2 00/11] RISC-V: Resolve the issue of loadable module on 64-bit Zong Li
2018-03-15  8:50 ` [PATCH v2 01/11] RISC-V: Add sections of PLT and GOT for kernel module Zong Li
2018-03-15  8:50 ` [PATCH v2 02/11] RISC-V: Add section of GOT.PLT " Zong Li
2018-03-15  8:50 ` [PATCH v2 03/11] RISC-V: Support GOT_HI20/CALL_PLT relocation type in " Zong Li
2018-03-15  8:50 ` Zong Li [this message]
2018-03-15  8:50 ` [PATCH v2 05/11] RISC-V: Support HI20/LO12_I/LO12_S " Zong Li
2018-03-15  8:50 ` [PATCH v2 06/11] RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq Zong Li
2018-03-15  8:50 ` [PATCH v2 07/11] RISC-V: Support ALIGN relocation type in kernel module Zong Li
2018-03-15  8:50 ` [PATCH v2 08/11] RISC-V: Support ADD32 " Zong Li
2018-03-15  8:50 ` [PATCH v2 09/11] RISC-V: Support SUB32 " Zong Li
2018-03-15  8:50 ` [PATCH v2 10/11] RISC-V: Enable module support in defconfig Zong Li
2018-03-15  8:50 ` [PATCH v2 11/11] RISC-V: Add definition of relocation types Zong Li
2018-03-16  1:18 ` [PATCH v2 00/11] RISC-V: Resolve the issue of loadable module on 64-bit Zong Li
2018-03-20 17:11 ` Palmer Dabbelt
2018-03-21  2:53   ` Zong Li
2018-03-24 12:59   ` Shea Levy
2018-03-24 15:21     ` Zong Li
2018-03-24 15:59       ` Shea Levy

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