From: Andrew Lunn <andrew@lunn.ch>
To: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Cc: "Russell King (Oracle)" <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Andy Whitcroft <apw@canonical.com>,
Dwaipayan Ray <dwaipayanray1@gmail.com>,
Lukas Bulwahn <lukas.bulwahn@gmail.com>,
Joe Perches <joe@perches.com>, Jonathan Corbet <corbet@lwn.net>,
Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Siddharth Vadapalli <s-vadapalli@ti.com>,
Roger Quadros <rogerq@kernel.org>,
Tero Kristo <kristo@kernel.org>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux@ew.tq-group.com
Subject: Re: [PATCH net-next 1/4] dt-bindings: net: ethernet-controller: update descriptions of RGMII modes
Date: Mon, 28 Apr 2025 16:08:10 +0200 [thread overview]
Message-ID: <9b9fc5d0-e973-4f4f-8dd5-d3896bf29093@lunn.ch> (raw)
In-Reply-To: <fdc02e46e4906ba92b562f8d2516901adc85659b.camel@ew.tq-group.com>
> > However, with the yaml stuff, if that is basically becoming "DT
> > specification" then it needs to be clearly defined what each value
> > actually means for the system, and not this vague airy-fairy thing
> > we have now.
> I agree with Russell that it seems preferable to make it unambiguous whether
> delays are added on the MAC or PHY side, in particular for fine-tuning. If
> anything is left to the implementation, we should make the range of acceptable
> driver behavior very clear in the documentation.
I think we should try the "Informative" route first, see what the DT
Maintainers think when we describe in detail how Linux interprets
these values.
I don't think a whole new set of properties will solve anything. I
would say the core of the problem is that there are multiple ways of
getting a working system, many of which don't fit the DT binding. But
DT developers don't care about that, they are just happy when it
works. Adding a different set of properties won't change that.
Andrew
next prev parent reply other threads:[~2025-04-28 14:08 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-15 10:18 [PATCH net-next 0/4] RGMII mode clarification + am65-cpsw fix Matthias Schiffer
2025-04-15 10:18 ` [PATCH net-next 1/4] dt-bindings: net: ethernet-controller: update descriptions of RGMII modes Matthias Schiffer
2025-04-15 10:36 ` Siddharth Vadapalli
2025-04-15 11:28 ` Matthias Schiffer
2025-04-15 11:55 ` Siddharth Vadapalli
2025-04-16 7:41 ` Matthias Schiffer
2025-04-22 8:56 ` Russell King (Oracle)
2025-04-22 14:40 ` Andrew Lunn
2025-04-22 8:41 ` Russell King (Oracle)
2025-04-18 20:40 ` Andrew Lunn
2025-04-22 8:37 ` Russell King (Oracle)
2025-04-15 10:54 ` Maxime Chevallier
2025-04-18 20:26 ` Andrew Lunn
2025-04-21 18:42 ` Rob Herring (Arm)
2025-04-21 19:20 ` Russell King (Oracle)
2025-04-22 15:00 ` Andrew Lunn
2025-04-22 15:31 ` Russell King (Oracle)
2025-04-28 11:29 ` Matthias Schiffer
2025-04-28 14:08 ` Andrew Lunn [this message]
2025-04-28 14:28 ` Siddharth Vadapalli
2025-04-28 14:45 ` Andrew Lunn
2025-04-29 7:24 ` Matthias Schiffer
2025-04-29 12:08 ` Andrew Lunn
2025-04-30 7:33 ` Matthias Schiffer
2025-04-15 10:18 ` [PATCH net-next 2/4] dt-bindings: net: ti: k3-am654-cpsw-nuss: update phy-mode in example Matthias Schiffer
2025-04-15 10:58 ` Maxime Chevallier
2025-04-18 20:48 ` Andrew Lunn
2025-04-21 18:44 ` Rob Herring (Arm)
2025-04-30 14:22 ` Roger Quadros
2025-05-07 9:51 ` Matthias Schiffer
2025-04-15 10:18 ` [PATCH net-next 3/4] net: ethernet: ti: am65-cpsw: fixup PHY mode for fixed RGMII TX delay Matthias Schiffer
2025-04-15 11:06 ` Maxime Chevallier
2025-04-18 20:50 ` Andrew Lunn
2025-04-30 14:56 ` Roger Quadros
2025-04-30 16:15 ` Andrew Lunn
2025-04-15 10:18 ` [PATCH net-next 4/4] checkpatch: check for comment explaining rgmii(|-rxid|-txid) PHY modes Matthias Schiffer
2025-04-15 11:15 ` Maxime Chevallier
2025-04-15 11:21 ` Matthias Schiffer
2025-04-15 12:46 ` Maxime Chevallier
2025-04-15 13:12 ` Andrew Lunn
2025-06-24 9:50 ` Matthias Schiffer
2025-04-15 13:20 ` Andrew Lunn
2025-04-15 13:36 ` Matthias Schiffer
2025-04-15 13:37 ` Matthias Schiffer
2025-04-17 10:28 ` Paolo Abeni
2025-04-15 16:11 ` Joe Perches
2025-04-16 7:48 ` Matthias Schiffer
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