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Subject: Re: dma_mask limited to 32-bits with OF platform device
To:     Roger Quadros <rogerq@ti.com>, Christoph Hellwig <hch@lst.de>,
        =?UTF-8?Q?P=c3=a9ter_Ujfalusi?= <peter.ujfalusi@ti.com>,
        Murali Karicheri <m-karicheri2@ti.com>,
        "Nori, Sekhar" <nsekhar@ti.com>, "Anna, Suman" <s-anna@ti.com>
Cc:     stefan.wahren@i2se.com, afaerber@suse.de, hverkuil@xs4all.nl,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Nishanth Menon <nm@ti.com>,
        "hdegoede@redhat.com" <hdegoede@redhat.com>
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 <3a91f306-f544-a63c-dfe2-7eae7b32bcca@arm.com>
 <56314192-f3c6-70c5-6b9a-3d580311c326@ti.com>
From:   Robin Murphy <robin.murphy@arm.com>
Message-ID: <9bd83815-6f54-2efb-9398-42064f73ab1c@arm.com>
Date:   Wed, 12 Feb 2020 14:04:31 +0000
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On 12/02/2020 12:33 pm, Roger Quadros wrote:
[...]
> For now, let's say that we limit dma-ranges to 4GB size. with 
> "dma-ranges = <0x00000000 0x00000000 0x1 0x00000000>;"
> Then, dma_bus_limit is set correctly to 0xffffffff, SATA driver sets 
> masks to 64-bit as IP supports that.
> 
> [   13.306847] ahci 4a140000.sata: dma_mask 0xffffffffffffffff, 
> coherent_mask 0xffffffffffffffff, dma_bus_limit 0xffffffff
> 
> However, the SATA controller still tries to do DMA above 32-bits.
> dma_alloc() doesn't seem to be taking dma_bus_limit into account?

Yay ARM LPAE... Peter and Christoph have already been playing 
whack-a-mole with other bugs under that config - is this with or without 
SWIOTLB? (and whichever way, does the other work any better?)

Robin.