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Sat, 24 Oct 2026 06:47:46 -0700 (PDT) Received: from [192.168.29.10] ([49.37.153.119]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-19894d5a10csm7575697c88.1.2026.10.24.06.47.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 24 Oct 2026 06:47:46 -0700 (PDT) Message-ID: <9be32afc-4794-4163-868b-a0af29d8a2f4@oss.qualcomm.com> Date: Sat, 24 Oct 2026 19:17:36 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/5] firmware: qcom: Add an TEE bus based ICE back-end To: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Abel Vesa , Kuldeep Singh , Neeraj Soni , Manivannan Sadhasivam , Sumit Garg , Selvam Sathappan Periakaruppan Cc: Basant Kumar , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org References: <20261021-ice-migrate-tee-svc-v1-0-b035be7aab0a@oss.qualcomm.com> <20261021-ice-migrate-tee-svc-v1-3-b035be7aab0a@oss.qualcomm.com> <21185cf6-253e-48bf-ae7c-bb160a4c089d@oss.qualcomm.com> Content-Language: en-US From: Harshal Dev Organization: Qualcomm In-Reply-To: <21185cf6-253e-48bf-ae7c-bb160a4c089d@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: AY2VIxCSamAB76Phn6CnnkBA1WIalfHl X-Authority-Analysis: v=2.4 cv=Ra0FmFtv c=1 sm=1 tr=0 ts=6adcb704 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=hZ1hWxSZf3UX9FuxeSnJ0A==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=63Wl8F-6p0i4whe-SeQA:9 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI0MDA1NCBTYWx0ZWRfX24O5QP2DcsFj kidr/H7Ciq31tcLvBUMEoDFnGjahpfVlZ+zypOsi6tRdDqrS3Dx1CppzwVw3T9e2HcU5swKCKMe KgVjS2PqtekagqyjAj+PPnHh+frh/KA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI0MDA1NCBTYWx0ZWRfX0q19mqog+sz1 vBHWQWbq33jl7ifZ4FWG3RchwK4gikji2SduxTlZEhm2DH3qhVcsCdKCWYUQYnRtBJr0nww30fj hkrbTS31Y3IYaV2s+dhT8vpv78f/zS6BOGQdv42H0KUTqWoqJUILra2C/5ZFBx6t6BA5LPeRj+r p+3VcDMEkLdXuq0Z6L8DuOQUoLWaTwF5LtUj/7rsP7nCjlOd+34/Y6nudVFl0YarB7jxzzPJJtQ DEKPQVii41BPIzPpUnFEYOLKi95HIJge1ujEyKkWGB263mLA9WbY028g6ZqTPZWIDZR1YeKemn7 D2+x4MCWqnQPgdy6gmAXonNixc49cuk3lW8FrjQthbSSwm/KBcKnpsQkITHdPIrzWzVvBWeTixR ZobZ0F7qhTptzHzcUAB//dlJ8JetrkuXZ+1qXGkJiQdy78jMbquudwNYPzglPoADS/BqWvkF188 Y61gMHp63TJ1pEQuTlw== X-Proofpoint-ORIG-GUID: AY2VIxCSamAB76Phn6CnnkBA1WIalfHl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-24_01,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610240054 Hi Konrad, On 22-10-2026 01:22 pm, Konrad Dybcio wrote: > On 10/21/26 5:43 PM, Harshal Dev wrote: >> Add support for a TEE client driver which forwards calls from the Inline >> Crypto Engine (ICE) service (invoked by the ICE driver) to the OPTEE ICE >> Psuedo-TA. >> >> The ICE PTA supports both ICE Legacy and Standard modes. In Standard mode >> Hardware Key Manager v1 is supported. >> >> Signed-off-by: Harshal Dev >> --- > > [...] > >> +static int qcom_ice_tee_generate_key(struct device *dev, >> + u8 *lt_key, size_t lt_key_size) >> +{ >> + struct qcom_ice_tee_private *data = dev_get_drvdata(dev); >> + struct tee_ioctl_invoke_arg inv_arg = { >> + .func = PTA_QCOM_ICE_GENERATE_KEY, >> + .session = data->session_id, >> + .num_params = TEE_NUM_PARAMS, >> + }; >> + struct tee_param param[TEE_NUM_PARAMS] = { }; >> + struct tee_shm *key_shm; >> + u8 *buf; >> + size_t out_size; >> + int ret; >> + >> + key_shm = tee_shm_alloc_kernel_buf(data->ctx, lt_key_size); >> + if (IS_ERR(key_shm)) >> + return PTR_ERR(key_shm); >> + >> + param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT; >> + param[0].u.memref.shm = key_shm; >> + param[0].u.memref.shm_offs = 0; >> + param[0].u.memref.size = lt_key_size; >> + >> + ret = tee_client_invoke_func(data->ctx, &inv_arg, param); >> + if (ret < 0 || inv_arg.ret != 0) { >> + dev_err(dev, >> + "ICE generate_key failed, ret=%d, err=0x%x\n", >> + ret, inv_arg.ret); >> + ret = ret ?: -EINVAL; >> + goto out; >> + } >> + >> + buf = tee_shm_get_va(key_shm, 0); >> + out_size = param[0].u.memref.size; >> + >> + memcpy(lt_key, buf, lt_key_size); >> + memzero_explicit(buf, out_size); > > LLM says: s/out_size/lt_key_size here? > > Or said another way, currently lt_key_size and out_size are not > cross checked > Ack. Will cross-check these values. > [...] > >> +static int qcom_ice_tee_probe(struct tee_client_device *ice_dev) >> +{ >> + struct device *dev = &ice_dev->dev; >> + struct qcom_ice_tee_private *data; >> + struct tee_ioctl_open_session_arg sess_arg = { >> + .clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL, >> + }; >> + int ret, err = -ENODEV; >> + >> + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); >> + if (!data) >> + return -ENOMEM; >> + >> + data->ctx = tee_client_open_context(NULL, optee_ctx_match, NULL, NULL); >> + if (IS_ERR(data->ctx)) >> + return -ENODEV; >> + >> + export_uuid(sess_arg.uuid, &ice_dev->id.uuid); >> + ret = tee_client_open_session(data->ctx, &sess_arg, NULL); >> + if (ret < 0 || sess_arg.ret != 0) { >> + dev_err(dev, >> + "tee_client_open_session failed, ret=%d, err=0x%x\n", >> + ret, sess_arg.ret); >> + err = ret ?: -EINVAL; >> + goto out_ctx; >> + } >> + >> + data->session_id = sess_arg.session; >> + dev_set_drvdata(dev, data); >> + >> + qcom_ice_ops_tee.dev = dev; >> + qcom_ice_svc_ops_register(&qcom_ice_ops_tee); >> + >> + return ret; > > This is always a 'return 0' > Ack. Regards, Harshal > Konrad