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From: Yi Liu <yi.l.liu@intel.com>
To: "Tian, Kevin" <kevin.tian@intel.com>,
	"joro@8bytes.org" <joro@8bytes.org>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"jgg@nvidia.com" <jgg@nvidia.com>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"baolu.lu@linux.intel.com" <baolu.lu@linux.intel.com>
Cc: "cohuck@redhat.com" <cohuck@redhat.com>,
	"eric.auger@redhat.com" <eric.auger@redhat.com>,
	"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"mjrosato@linux.ibm.com" <mjrosato@linux.ibm.com>,
	"chao.p.peng@linux.intel.com" <chao.p.peng@linux.intel.com>,
	"yi.y.sun@linux.intel.com" <yi.y.sun@linux.intel.com>,
	"peterx@redhat.com" <peterx@redhat.com>,
	"jasowang@redhat.com" <jasowang@redhat.com>,
	"shameerali.kolothum.thodi@huawei.com"
	<shameerali.kolothum.thodi@huawei.com>,
	"lulu@redhat.com" <lulu@redhat.com>,
	"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>,
	"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-kselftest@vger.kernel.org"
	<linux-kselftest@vger.kernel.org>,
	"Duan, Zhenzhong" <zhenzhong.duan@intel.com>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
	"Zeng, Xin" <xin.zeng@intel.com>,
	"Zhao, Yan Y" <yan.y.zhao@intel.com>,
	"j.granados@samsung.com" <j.granados@samsung.com>
Subject: Re: [PATCH v8 09/10] iommufd: Add data structure for Intel VT-d stage-1 cache invalidation
Date: Thu, 28 Dec 2023 16:35:13 +0800	[thread overview]
Message-ID: <9be98837-b656-49e5-8ae6-d70ad2c073b4@intel.com> (raw)
In-Reply-To: <BN9PR11MB5276A53786CD3AF7F170E8B98C9EA@BN9PR11MB5276.namprd11.prod.outlook.com>

On 2023/12/28 14:38, Tian, Kevin wrote:
>> From: Tian, Kevin
>> Sent: Thursday, December 28, 2023 2:38 PM
>>
>>> From: Liu, Yi L <yi.l.liu@intel.com>
>>> Sent: Thursday, December 28, 2023 12:14 AM
>>> +/**
>>> + * struct iommu_hwpt_vtd_s1_invalidate - Intel VT-d cache invalidation
>>> + *                                       (IOMMU_HWPT_INVALIDATE_DATA_VTD_S1)
>>> + * @addr: The start address of the range to be invalidated. It needs to
>>> + *        be 4KB aligned.
>>> + * @npages: Number of contiguous 4K pages to be invalidated.
>>> + * @flags: Combination of enum iommu_hwpt_vtd_s1_invalidate_flags
>>> + * @hw_error: One of enum iommu_hwpt_vtd_s1_invalidate_error
>>> + *
>>> + * The Intel VT-d specific invalidation data for user-managed stage-1 cache
>>> + * invalidation in nested translation. Userspace uses this structure to
>>> + * tell the impacted cache scope after modifying the stage-1 page table.
>>> + *
>>> + * Invalidating all the caches related to the page table by setting @addr
>>> + * to be 0 and @npages to be U64_MAX.
>>> + *
>>> + * The device TLB will be invalidated automatically if ATS is enabled.
>>> + *
>>> + * The @hw_error is meaningful when the entry is handled by the kernel.
>>> + * Check the entry_num output of IOMMU_HWPT_INVALIDATE ioctl to
>>> know the
>>> + * handled entries. @hw_error only covers the errors detected by
>> hardware.
>>> + * The software detected errors would go through the normal ioctl errno.
>>> + */
>>
>> * An entry is considered 'handled' after it passes the audit and submitted
>> * to the IOMMU by the underlying driver. Check the @entry_num output of
>> * struct iommu_hwpt_invalidate for the number of handled entries. A
>> 'handled'
>> * request may still fail in hardware for various reasons, e.g. due to timeout
>> * on waiting for device response upon a device TLB invalidation request. In
>> * such case the hardware error info is reported in the @hw_error field of the
>> * handled entry.
> 
> with that:
> 
> Reviewed-by: Kevin Tian <kevin.tian@intel.com>

yep.

-- 
Regards,
Yi Liu

  reply	other threads:[~2023-12-28  8:32 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-27 16:13 [PATCH v8 00/10] Add iommufd nesting (part 2/2) Yi Liu
2023-12-27 16:13 ` [PATCH v8 01/10] iommu: Add cache_invalidate_user op Yi Liu
2023-12-27 16:13 ` [PATCH v8 02/10] iommufd: Add IOMMU_HWPT_INVALIDATE Yi Liu
2023-12-28  6:07   ` Tian, Kevin
2023-12-27 16:13 ` [PATCH v8 03/10] iommu: Add iommu_copy_struct_from_user_array helper Yi Liu
2023-12-27 16:13 ` [PATCH v8 04/10] iommufd/selftest: Add mock_domain_cache_invalidate_user support Yi Liu
2023-12-27 16:13 ` [PATCH v8 05/10] iommufd/selftest: Add IOMMU_TEST_OP_MD_CHECK_IOTLB test op Yi Liu
2023-12-27 16:13 ` [PATCH v8 06/10] iommufd/selftest: Add coverage for IOMMU_HWPT_INVALIDATE ioctl Yi Liu
2023-12-28  6:14   ` Tian, Kevin
2023-12-28  8:32     ` Yi Liu
2023-12-27 16:13 ` [PATCH v8 07/10] iommu/vt-d: Allow qi_submit_sync() to return the QI faults Yi Liu
2023-12-28  6:17   ` Tian, Kevin
2023-12-28  8:33     ` Yi Liu
2024-01-01  3:34     ` Baolu Lu
2024-01-11  7:14       ` Ethan Zhao
2023-12-27 16:13 ` [PATCH v8 08/10] iommu/vt-d: Convert stage-1 cache invalidation to return QI fault Yi Liu
2023-12-28  6:18   ` Tian, Kevin
2023-12-27 16:13 ` [PATCH v8 09/10] iommufd: Add data structure for Intel VT-d stage-1 cache invalidation Yi Liu
2023-12-28  6:37   ` Tian, Kevin
2023-12-28  6:38   ` Tian, Kevin
2023-12-28  8:35     ` Yi Liu [this message]
2023-12-27 16:13 ` [PATCH v8 10/10] iommu/vt-d: Add iotlb flush for nested domain Yi Liu
2023-12-28  7:11   ` Tian, Kevin
2023-12-28  8:42     ` Yi Liu
2023-12-27 20:58 ` [PATCH v8 00/10] Add iommufd nesting (part 2/2) Nicolin Chen
2023-12-28  1:48   ` Yi Liu

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