From: Yicong Yang <yangyicong@huawei.com>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: <yangyicong@hisilicon.com>, <will@kernel.org>,
<mark.rutland@arm.com>, <hejunhao3@huawei.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>,
<prime.zeng@hisilicon.com>, <fanghao11@huawei.com>
Subject: Re: [PATCH 3/7] drivers/perf: hisi_pcie: Add more events for counting TLP bandwidth
Date: Wed, 21 Feb 2024 17:40:14 +0800 [thread overview]
Message-ID: <9c033974-aa73-2b1d-c997-e3c38e38a859@huawei.com> (raw)
In-Reply-To: <20240208122029.000005e1@Huawei.com>
On 2024/2/8 20:20, Jonathan Cameron wrote:
> On Sun, 4 Feb 2024 15:45:23 +0800
> Yicong Yang <yangyicong@huawei.com> wrote:
>
>> From: Yicong Yang <yangyicong@hisilicon.com>
>>
>> A typical PCIe transaction is consisted of various TLP packets in both
>> direction. For counting bandwidth only memory read events are exported
>> currently. Add memory write and completion counting events of both
>> direction to complementation.
>
> complementation?
>
sorry for the typo. will fix.
>>
>> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Thanks.
>
>> ---
>> drivers/perf/hisilicon/hisi_pcie_pmu.c | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
>> index 9623bed93876..83be3390686c 100644
>> --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
>> +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
>> @@ -726,10 +726,18 @@ static struct attribute *hisi_pcie_pmu_events_attr[] = {
>> HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_cnt, 0x10210),
>> HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_latency, 0x0011),
>> HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_cnt, 0x10011),
>> + HISI_PCIE_PMU_EVENT_ATTR(rx_mwr_flux, 0x0104),
>> + HISI_PCIE_PMU_EVENT_ATTR(rx_mwr_time, 0x10104),
>> HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_flux, 0x0804),
>> HISI_PCIE_PMU_EVENT_ATTR(rx_mrd_time, 0x10804),
>> + HISI_PCIE_PMU_EVENT_ATTR(rx_cpl_flux, 0x2004),
>> + HISI_PCIE_PMU_EVENT_ATTR(rx_cpl_time, 0x12004),
>> + HISI_PCIE_PMU_EVENT_ATTR(tx_mwr_flux, 0x0105),
>> + HISI_PCIE_PMU_EVENT_ATTR(tx_mwr_time, 0x10105),
>> HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_flux, 0x0405),
>> HISI_PCIE_PMU_EVENT_ATTR(tx_mrd_time, 0x10405),
>> + HISI_PCIE_PMU_EVENT_ATTR(tx_cpl_flux, 0x1005),
>> + HISI_PCIE_PMU_EVENT_ATTR(tx_cpl_time, 0x11005),
>> NULL
>> };
>>
>
> .
>
next prev parent reply other threads:[~2024-02-21 9:40 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-04 7:45 [PATCH 0/7] Several updates for HiSilicon PCIe PMU driver Yicong Yang
2024-02-04 7:45 ` [PATCH 1/7] drivers/perf: hisi_pcie: Introduce hisi_pcie_pmu_get_filter() Yicong Yang
2024-02-08 12:06 ` Jonathan Cameron
2024-02-08 12:18 ` Jonathan Cameron
2024-02-21 9:39 ` Yicong Yang
2024-02-04 7:45 ` [PATCH 2/7] drivers/perf: hisi_pcie: Fix incorrect counting under metric mode Yicong Yang
2024-02-08 12:19 ` Jonathan Cameron
2024-02-04 7:45 ` [PATCH 3/7] drivers/perf: hisi_pcie: Add more events for counting TLP bandwidth Yicong Yang
2024-02-08 12:20 ` Jonathan Cameron
2024-02-21 9:40 ` Yicong Yang [this message]
2024-02-04 7:45 ` [PATCH 4/7] drivers/perf: hisi_pcie: Check the target filter properly Yicong Yang
2024-02-08 12:29 ` Jonathan Cameron
2024-02-21 9:46 ` Yicong Yang
2024-02-22 1:21 ` hejunhao
2024-02-22 1:29 ` hejunhao
2024-02-04 7:45 ` [PATCH 5/7] drivers/perf: hisi_pcie: Relax the check on related events Yicong Yang
2024-02-04 7:45 ` [PATCH 6/7] drivers/perf: hisi_pcie: Merge find_related_event() and get_event_idx() Yicong Yang
2024-02-08 12:39 ` Jonathan Cameron
2024-02-22 3:00 ` hejunhao
2024-02-04 7:45 ` [PATCH 7/7] docs: perf: Update usage for target filter of hisi-pcie-pmu Yicong Yang
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