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Wed, 09 Apr 2025 17:57:44 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id DD0FB40045; Wed, 9 Apr 2025 17:56:38 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 378189BAC1C; Wed, 9 Apr 2025 17:54:35 +0200 (CEST) Received: from [10.48.87.62] (10.48.87.62) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 9 Apr 2025 17:54:34 +0200 Message-ID: <9c9172b8-508c-4855-9299-aab72ac2fae6@foss.st.com> Date: Wed, 9 Apr 2025 17:54:33 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 0/7] Add STM32MP25 SPI NOR support To: Krzysztof Kozlowski CC: Rob Herring , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Krzysztof Kozlowski , Catalin Marinas , Will Deacon , , , , , References: <20250407-upstream_ospi_v6-v8-0-7b7716c1c1f6@foss.st.com> <20250408-opal-pillbug-of-acumen-0fbb68@shite> Content-Language: en-US From: Patrice CHOTARD In-Reply-To: <20250408-opal-pillbug-of-acumen-0fbb68@shite> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-09_05,2025-04-08_04,2024-11-22_01 On 4/8/25 08:38, Krzysztof Kozlowski wrote: > On Mon, Apr 07, 2025 at 03:27:31PM GMT, Patrice Chotard wrote: >> Signed-off-by: Patrice Chotard >> --- >> Patrice Chotard (7): >> MAINTAINERS: add entry for STM32 OCTO MEMORY MANAGER driver >> dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller >> memory: Add STM32 Octo Memory Manager driver >> arm64: dts: st: Add OMM node on stm32mp251 >> arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi >> arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board >> arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver >> >> .../memory-controllers/st,stm32mp25-omm.yaml | 226 ++++++++++ >> MAINTAINERS | 6 + >> arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 51 +++ >> arch/arm64/boot/dts/st/stm32mp251.dtsi | 54 +++ >> arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 32 ++ >> arch/arm64/configs/defconfig | 2 + >> drivers/memory/Kconfig | 17 + >> drivers/memory/Makefile | 1 + >> drivers/memory/stm32_omm.c | 474 +++++++++++++++++++++ >> 9 files changed, 863 insertions(+) >> --- >> base-commit: 88424abd55ab36c3565898a656589a0a25ecd92f > > That's unknown commit. > > b4 diff '20250407-upstream_ospi_v6-v8-0-7b7716c1c1f6@foss.st.com' > Using cached copy of the lookup > --- > Analyzing 81 messages in the thread > Preparing fake-am for v7: MAINTAINERS: add entry for STM32 OCTO MEMORY MANAGER driver > ERROR: Could not write fake-am tree > --- > Could not create fake-am range for lower series v7 > > I tried on latest next, on some March next, on latest mainline. It seems > you use some weird base here, so anyway I won't be able to apply it. It was based on next-20250317 plus the 2 ospi patches already merged by Mark Brown, that's why. > > Please split the patchset per subsystem and send something based on > maintainer tree (so for me my for-next branch), mainline (which is the > same as for-next currently) or linux-next.... which would be the same as > my for-next branch currently. ok Thanks Patrice > > Best regards, > Krzysztof >