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Sun, 01 Nov 2026 15:22:09 -0800 (PST) Received: from [192.168.1.7] ([31.94.68.191]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4abf5b27e46sm367155575e9.3.2026.11.01.15.22.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 01 Nov 2026 15:22:09 -0800 (PST) Message-ID: <9c9310ca-9c2a-4aa3-b03c-83fbaf17710b@gmail.com> Date: Sun, 1 Nov 2026 23:22:08 +0000 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: amd-gfx@lists.freedesktop.org Cc: Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Harry Wentland , Leo Li , Rodrigo Siqueira , Mario Limonciello , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Richard Lane From: Richard Lane Subject: [PATCH v2 0/3] drm/amd: Enable 2x1 tiled display support on Apple 5K iMacs Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi folks, Apple 27" 5K iMacs (2014-2019, iMac15,1 through Polaris-based iMac19,1) drive their internal 5120x2880 panel as a 2x1 tiled display using two 2560x2880 streams over an internal eDP root link and a secondary DP link. At boot, the Apple EFI firmware initializes only a single 2560x2880 pipe and leaves the secondary DP tile unlatched with HPD deasserted. Because the secondary tile reports HPD low and requires a vendor-specific DPCD handshake before it responds as a DisplayPort sink, amdgpu currently fails to detect the second tile, leaving Linux limited to single-tile resolutions. This series enables full 5120x2880 dual-tile operation on DCE < 12 Apple 5K iMacs so that the internal 5K panel behaves like a standard DisplayID tiled monitor: 1. Calculate the pre-OS framebuffer reservation in GMC v7 and v8 using mmGRPH_PITCH and the mmGRPH_PRIMARY_SURFACE_ADDRESS offset from vram_start so the full [3 MiB, 59.25 MiB) Apple EFI scanout surface is preserved during boot handover without vendor-specific quirks. 2. Point the secondary DP link to the root eDP link via an EDID quirk on DCE < 12 (covering iMac15,1, iMac17,1, iMac18,3, and Polaris-based iMac19,1), latch the secondary tile via DPCD 0x4F1 on the root eDP link, write the 3-byte Boot Camp source table (0x310) on the secondary link, keep the secondary tile out of D3 power-down, and unlatch the TCON back to single-pipe mode on suspend/shutdown. Once unlocked, DRM's DisplayID parser populates has_tile, tile_group, and tile_is_single_monitor on both connectors natively. (DCE >= 12 support for Vega-equipped iMac19,1, iMacPro1,1, and 2020 iMac20,x is noted as TODO.) 3. Report all_displays_in_sync = true to PowerPlay after dc_commit_streams() whenever all active streams are synchronized into a single timing group by program_timing_sync() (timing_sync_info.group_size == params.stream_count), allowing SMU7 to downclock MCLK at idle without modeset underflows. Changes in v2: - Patch 1: Replaced the hardcoded 64 MiB Apple quirk in amdgpu_gmc.c with a generic calculation in gmc_v7_0_get_vbios_fb_size() and gmc_v8_0_get_vbios_fb_size() using mmGRPH_PITCH and mmGRPH_PRIMARY_SURFACE_ADDRESS. - Patch 2: Dropped the DRM_MODE_CONNECTOR_eDP override in amdgpu_dm_connector.c in favor of DRM's native DisplayID tile properties (has_tile, tile_group, tile_is_single_monitor). Renamed tiled_peer to apple_5k_peer and set it only on the secondary DP link, removing dm_helpers_wire_tiled_peer(), dc_link_is_apple_5k_secondary(), and inline explanatory comments. - Patch 3: Made the PowerPlay sync check generic for any combination of synchronized displays by checking timing_sync_info.group_size == params.stream_count instead of tiled_peer. Regards, Richard Richard Lane (3): drm/amdgpu: use pitch and surface offset for GMC v7/v8 fb size drm/amd/display: unlock secondary tile on Apple 5K iMac panels drm/amd/display: report synced displays to PowerPlay for MCLK switch drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 8 +++-- drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 8 +++-- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++++++++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 22 ++++++++++++++ drivers/gpu/drm/amd/display/dc/dc.h | 1 + .../drm/amd/display/dc/link/link_detection.c | 7 ++++- .../dc/link/protocols/link_dp_capability.c | 4 +++ .../display/dc/link/protocols/link_dp_phy.c | 3 ++ 8 files changed, 75 insertions(+), 7 deletions(-) -- 2.55.0