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From: Alexandre Ghiti <alex@ghiti.fr>
To: Anton Blanchard <antonb@tenstorrent.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Subject: Re: [PATCH] riscv: Fix toolchain vector detection
Date: Mon, 26 Aug 2024 13:50:35 +0200	[thread overview]
Message-ID: <9cdf868a-e937-4be3-8e7a-a7d12d3fe5da@ghiti.fr> (raw)
In-Reply-To: <20240819001131.1738806-1-antonb@tenstorrent.com>

Hi Anton,

On 19/08/2024 02:11, Anton Blanchard wrote:
> A recent change to gcc flags rv64iv as no longer valid:
>
>     cc1: sorry, unimplemented: Currently the 'V' implementation
>     requires the 'M' extension
>
> and as a result vector support is disabled. Fix this by adding m
> to our toolchain vector detection code.
>
> Signed-off-by: Anton Blanchard <antonb@tenstorrent.com>
> ---
>   arch/riscv/Kconfig | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 0f3cd7c3a436..939ea7f6a228 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -552,8 +552,8 @@ config RISCV_ISA_SVPBMT
>   config TOOLCHAIN_HAS_V
>   	bool
>   	default y
> -	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64iv)
> -	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32iv)
> +	depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv)
> +	depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv)
>   	depends on LLD_VERSION >= 140000 || LD_VERSION >= 23800
>   	depends on AS_HAS_OPTION_ARCH
>   


As Conor noted, we need to backport this to stable releases so here is a 
Fixes tag:

Fixes: fa8e7cce55da ("riscv: Enable Vector code to be built")

Thanks,

Alex



  parent reply	other threads:[~2024-08-26 11:50 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-19  0:11 Anton Blanchard
2024-08-19 16:45 ` Conor Dooley
2024-08-26 11:50 ` Alexandre Ghiti [this message]
2024-09-03 19:10 ` patchwork-bot+linux-riscv

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