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Thu, 12 Sep 2024 09:57:12 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 48C9vBg1002912 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 12 Sep 2024 09:57:11 GMT Received: from [10.204.67.70] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 12 Sep 2024 02:57:02 -0700 Message-ID: <9cf67bc8-d567-4fbe-af77-bdc79f74fc0a@quicinc.com> Date: Thu, 12 Sep 2024 15:26:59 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/5] phy: qcom: edp: Add support for eDP PHY on SA8775P Content-Language: en-US To: Dmitry Baryshkov CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , References: <20240911100813.338-1-quic_mukhopad@quicinc.com> <20240911100813.338-4-quic_mukhopad@quicinc.com> From: Soutrik Mukhopadhyay In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: HBOVyAdpivXZcwafyU0DnSmEZOsifBef X-Proofpoint-ORIG-GUID: HBOVyAdpivXZcwafyU0DnSmEZOsifBef X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 impostorscore=0 mlxscore=0 bulkscore=0 suspectscore=0 priorityscore=1501 mlxlogscore=999 lowpriorityscore=0 adultscore=0 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409120070 On 9/11/2024 4:10 PM, Dmitry Baryshkov wrote: > On Wed, 11 Sept 2024 at 13:08, Soutrik Mukhopadhyay > wrote: >> Add support for eDP PHY v5 found on the Qualcomm SA8775P platform. >> >> Signed-off-by: Soutrik Mukhopadhyay >> --- >> drivers/phy/qualcomm/phy-qcom-edp.c | 47 +++++++++++++++++++++++++++++ >> 1 file changed, 47 insertions(+) >> >> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c >> index 0f860a807d1b..34a47cd2919d 100644 >> --- a/drivers/phy/qualcomm/phy-qcom-edp.c >> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c >> @@ -191,6 +191,45 @@ static u8 edp_phy_aux_cfg_v4[10] = { >> 0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03 >> }; >> >> +static const u8 edp_swing_hbr_rbr_v5[4][4] = { >> + { 0x07, 0x0f, 0x16, 0x1f }, >> + { 0x0d, 0x16, 0x1e, 0xff }, >> + { 0x11, 0x1b, 0xff, 0xff }, >> + { 0x16, 0xff, 0xff, 0xff } >> +}; > Same as v4 Yes, we will reuse edp_swing_hbr_rbr for v5. > >> + >> +static const u8 edp_pre_emp_hbr_rbr_v5[4][4] = { >> + { 0x05, 0x11, 0x17, 0x1d }, >> + { 0x05, 0x11, 0x18, 0xff }, >> + { 0x06, 0x11, 0xff, 0xff }, >> + { 0x00, 0xff, 0xff, 0xff } >> +}; > Could you please confirm that there is a single value difference? Yes, there is a single value difference. > >> + >> +static const u8 edp_swing_hbr2_hbr3_v5[4][4] = { >> + { 0x0b, 0x11, 0x17, 0x1c }, >> + { 0x10, 0x19, 0x1f, 0xff }, >> + { 0x19, 0x1f, 0xff, 0xff }, >> + { 0x1f, 0xff, 0xff, 0xff } >> +}; > Same as v4 Yes, we will reuse edp_swing_hbr2_hbr3 for v5. > >> + >> +static const u8 edp_pre_emp_hbr2_hbr3_v5[4][4] = { >> + { 0x0c, 0x15, 0x19, 0x1e }, >> + { 0x0b, 0x15, 0x19, 0xff }, >> + { 0x0e, 0x14, 0xff, 0xff }, >> + { 0x0d, 0xff, 0xff, 0xff } >> +}; > This one looks fine > >> + >> +static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg_v5 = { >> + .swing_hbr_rbr = &edp_swing_hbr_rbr_v5, >> + .swing_hbr3_hbr2 = &edp_swing_hbr2_hbr3_v5, >> + .pre_emphasis_hbr_rbr = &edp_pre_emp_hbr_rbr_v5, >> + .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3_v5, >> +}; >> + >> +static u8 edp_phy_aux_cfg_v5[10] = { >> + 0x00, 0x13, 0xa4, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03 >> +}; >> + >> static int qcom_edp_phy_init(struct phy *phy) >> { >> struct qcom_edp *edp = phy_get_drvdata(phy); >> @@ -520,6 +559,13 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = { >> .com_configure_ssc = qcom_edp_com_configure_ssc_v4, >> }; >> >> +static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cfg = { >> + .is_edp = false, >> + .aux_cfg = edp_phy_aux_cfg_v5, >> + .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg_v5, >> + .ver_ops = &qcom_edp_phy_ops_v4, >> +}; >> + >> static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = { >> .aux_cfg = edp_phy_aux_cfg_v4, >> .ver_ops = &qcom_edp_phy_ops_v4, >> @@ -1114,6 +1160,7 @@ static int qcom_edp_phy_probe(struct platform_device *pdev) >> } >> >> static const struct of_device_id qcom_edp_phy_match_table[] = { >> + { .compatible = "qcom,sa8775p-edp-phy", .data = &sa8775p_dp_phy_cfg, }, >> { .compatible = "qcom,sc7280-edp-phy", .data = &sc7280_dp_phy_cfg, }, >> { .compatible = "qcom,sc8180x-edp-phy", .data = &sc7280_dp_phy_cfg, }, >> { .compatible = "qcom,sc8280xp-dp-phy", .data = &sc8280xp_dp_phy_cfg, }, >> -- >> 2.17.1 >> >