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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: Yl7NaT8tNxzyttfNaqI0gkwBbFL7R6AQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDEwNSBTYWx0ZWRfX1jVAiCvqgMdf FxC3acOblWKAEQy619CrzEzTmLs9r2imm4RScXwZ7Icypct3sly4LobZVXeXkLn9ffQDsFB45rn CxSCK0RhoI8yGNuVKJWyMecnVWq8tybU2rND6wpANYy4tnk1bilHK3aC4FwAb1W+cAYuA8rtDFu xuET8P8IdAV459xBvKoFwZP106XXi90JimA80Bn5YsWWjZ254rCBsgt7B0vB3d/VChKffPOT132 L6IxTunSbXGX8ee9qZYjFDdd2SKsjQtUWs54sJX41ojzVUme7GQ9R8ZVHmtShDioe048LtXs6qF QUw5p6m4qnno025PES4qIry2kiQ+sn/oQdPudRtlVHSDfnbQOvUiS9zyL8QXfoeP0YfDIOWeH26 dPWnhABMz0GUBvJ6OqR02s4V4fd38Rk4ASwvdtKNQgLyrBspnETj+JmDCrQvbghlYhfmAyn7dih IjTRmzX1X59glx/HPVg== X-Proofpoint-GUID: Yl7NaT8tNxzyttfNaqI0gkwBbFL7R6AQ X-Authority-Analysis: v=2.4 cv=AOFXvqQI c=1 sm=1 tr=0 ts=6978b502 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=hxDPLbPtHj1mDd5Mi3AA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_02,2026-01-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 phishscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 spamscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270105 On 1/27/2026 5:41 PM, Prakash Gupta wrote: > Commit d4a44f0750bb ("iommu/arm-smmu: Invoke pm_runtime across the driver") > enabled pm_runtime for the arm-smmu device. On systems where the SMMU > sits in a power domain, all register accesses must be done while the > device is runtime-resumed to avoid unclocked register reads and > potential NoC errors. > > So far, this has not been an issue for most SMMU clients because > stall-on-fault is enabled by default. While a translation fault is > being handled, the SMMU stalls further translations for that context > bank, so the fault handler would not race with a powered-down > SMMU. > > Adreno SMMU now disables stall-on-fault in the presence of fault > storms to avoid saturating SMMU resources and hanging the GMU. With > stall-on-fault disabled, the SMMU can generate faults while its power > domain may no longer be enabled, which makes unclocked accesses to > fault-status registers in the SMMU fault handlers possible. > > Guard the context and global fault handlers with arm_smmu_rpm_get() / > arm_smmu_rpm_put() so that all SMMU fault register accesses are done > with the SMMU powered. > > Fixes: b13044092c1e ("drm/msm: Temporarily disable stall-on-fault after a page fault") > Co-developed-by: Pratyush Brahma > Signed-off-by: Pratyush Brahma > Signed-off-by: Prakash Gupta Acked-by: Akhil P Oommen -Akhil