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Tue, 10 Nov 2026 17:35:34 +0000 (GMT) Received: from [9.39.16.14] (unknown [9.39.16.14]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 10 Nov 2026 17:35:34 +0000 (GMT) Message-ID: <9d64e866-1bfd-4e7c-aa8f-fac4f49e8e91@linux.ibm.com> Date: Tue, 10 Nov 2026 23:05:33 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/4] powerpc/topology: Introduce llc_override kernel parameter To: Tim Chen , maddy@linux.ibm.com, linuxppc-dev@lists.ozlabs.org, peterz@infradead.org Cc: christophe.leroy@csgroup.eu, linux-kernel@vger.kernel.org, ritesh.list@gmail.com, kprateek.nayak@amd.com, yu.c.chen@intel.com, vineethr@linux.ibm.com, vincent.guittot@linaro.org, srikar@linux.ibm.com, npiggin@gmail.com, mpe@ellerman.id.au References: <20261023131646.2907938-1-sshegde@linux.ibm.com> <4a71f654cdc03973f309754a2f61810b4547a471.camel@linux.intel.com> From: Shrikanth Hegde Content-Language: en-US In-Reply-To: <4a71f654cdc03973f309754a2f61810b4547a471.camel@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=J+M/fwnS c=1 sm=1 tr=0 ts=6af355ef cx=c_pps a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=V8glGbnc2Ofi9Qvn3v5h:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=s9x9zBqOSCmCEyYDc3wA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTEwMDA2OCBTYWx0ZWRfX168KeEo7C3Pf Iht2xyNDK1Zo7qk+Boqqp5v8nDxhvGiCcIVuR8IeI0jcZsrNR+AH3NQeNxfit7ZmiO7kHtUt9if WfILHOLpYAb5dLPA/t5jQd5l1e91ngNqFfKLwyXbn5S4u0js18IYtHZVWIJIg0ULjtnP3QQ3RKa JoTDxjW2KrgX2vo6nVIfhqXw65e9jGmAAVOGGVcCF7RTMhKkDH9n3Z+50hEQGtcy6OYnW3mv96G 3/DdkU/paVB+K0UJJ4orUutWtq7ZwlYR783OC33G5/1R9o4kzMMld9Hqg5VYPUNYu+6w5ahE4p8 KT5F/Pw/0DHqyx1dxgId9To/TjeWogDCJ+Wr3gFIqZ1QwUhHOQ94SipONGooQm47PpHvt6MVud9 cGNcMll9svCa7h4pjzM91nTZi2U5tIy2R2qb8/s5FgxZqA2M6Yl4eA28VQe+MuN/6GdPEqeWz7W CxucJljfq5YVsKWVzFg== X-Proofpoint-Spam-Info: AW1haW4tMjYxMTEwMDA2OCBTYWx0ZWRfX2+lx8KzlT8Sj h4iDXBPrqLoZ+2eCbsPVVqOyF3NysSgdeBDCXHS7TKlHXCOCzuBZ019yuYGdSBtIj6fAHbgtvNo Ska0ki45VuxS8FDetJi6BKd/IDE3enU= X-Proofpoint-GUID: HxpX8lPk9VpHsN5sMJufitYsGkoTShTb X-Proofpoint-ORIG-GUID: MatCVIMhmKxeowZDDHUfQlBY9hcxoJ4n X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-10_05,2026-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 bulkscore=0 adultscore=0 suspectscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 impostorscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611100068 Hi Tim, Thanks for reviewing the changes. On 10/23/26 11:28 PM, Tim Chen wrote: > On Fri, 2026-10-23 at 18:46 +0530, Shrikanth Hegde wrote: >> Provide an option for users to enable cache aware scheduling on powerpc >> via a command line parameter. >> >> More details of the problem and context is in cover-letter of v1. >> v1: https://lore.kernel.org/all/20261012102037.2477378-1-sshegde@linux.ibm.com/ >> >> v1->v2: >> - Move to kernel parameters from debugfs. This helps to keep >> llc_id consistent which doesn't change across sched domain >> rebuilds. (Tim Chen) >> - Update arch_llc_mask to reflect the override (Tim Chen) >> - Limit only to mc, pkg (Srikar Dronamraju) >> >> Notes: >> >> - A selftest for the functional validation of cache aware scheduling >> is a good idea as we discussed in v1. It is a significant change on >> its own and likely takes time. I am thinking it might be good idea to >> revisit selftests for scheduler in general. (We have very few). >> Maybe worth a discussion in coming OSPM. >> >> - I am on parental leave. This version is pretty much what I had last week >> and I haven't gotten any chance to update since. just sending it out. >> Sorry if I have missed to address any comments. >> Please expect delays in my response. > > Thanks for sending this while on leave, and congratulations! > > The updated approach with boot parameters looks good to me. > Some minor points: > > 1. llc_bytes. As Chen Yu noted, get_effective_llc_bytes() returns 0 > on powerpc because the generic cacheinfo is not populated. With > NUMA balancing on and the default llc_aggr_tolerance, any process > with a footprint then fails exceed_llc_capacity(), so cache aware > scheduling still does not engage. > Let me first see if powerpc can migrate to generic cacheinfo. > 2. Bisection. Patch 2 moves SD_SHARE_LLC to MC/PKG, but > arch_llc_mask() only follows in patch 3, so a kernel at patch 2 > booted with llc_override=mc has sd_llc at MC with per-L2 llc ids, > causing mismatch. It may be better to squash 2 and 3. Alright. > > 3. llc_override is only written at boot. Making it > > static int llc_override __ro_after_init; > > and then you don't have to worry about READ_ONCE and WRITE_ONCE > to it as Chen Yu pointed out. > Sure. > Tim > >> >> Shrikanth Hegde (4): >> powerpc/topology: Introduce llc_override kernel parameter >> powerpc/topology: Update mc/pkg flags based on llc_override >> powerpc/topology: update arch_llc_mask based llc_override >> Documentation/powerpc: Add details about llc_override >> >> .../admin-guide/kernel-parameters.txt | 15 ++++ >> arch/powerpc/include/asm/topology.h | 8 +-- >> arch/powerpc/kernel/smp.c | 69 +++++++++++++++++-- >> 3 files changed, 81 insertions(+), 11 deletions(-)