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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: mH5Vdg9aUhKlGSFnVp7Dr97CWBGT7HlP X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDA0MSBTYWx0ZWRfX+zjF5TuSQAN+ T8J9Mcn7x0N6YhRrynQPgsmRh/jSxCTS8l5c1yav+1jH0Qh3gieQcxk78xGkzDqFVjCkqGo6Sj1 PoWC3Rkoyu6dLeCYLjZH1aX1nv35F34= X-Proofpoint-GUID: mH5Vdg9aUhKlGSFnVp7Dr97CWBGT7HlP X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDA0MSBTYWx0ZWRfX1sQE4DFIQpS4 CHPZZpvp1lNLAWpXTAdVsJMZsYfFEuU2xFxMObtGFqjAfwSp+4tSoe7YzFfvdUKcTYySo/j/2dY lXNFWskF88j2QE3qi/+YrWEfg1oR5sXFjgraj3Yr/dqWDFEKrVm7vmBeCH+2kI4sVSzXhOlYm7G 6sAQeaIqpKIwqlcpCQ6+l2v5ABO+DhaGzEaJRgrzAqmlnKwOIIurvNlSeuCfugkuMQH1HPc4NGD LhSMiI3+JeCKo93ALx2akfCk/hv31yduqETOB5bqQdo3b72DoGtQbWeH4OWWJ+pFpXMvL1TSwft 5NHl0lvqJ6yCXSEztWMX7Hc3WW54Ue5EJqNqzJ7UqyUBppZdIs5WtVVC4VakOsii/zGxJAftIKw 7liWtj4VakmJpLzO0WjyAB0QRfmZ5oZJMgzq1kaaSf6evxIMS9Yp5kbgk4PMI0NkWCTgVS6uZf+ xonYMn6E4NAZqJzMAXg== X-Authority-Analysis: v=2.4 cv=SYZi5fRu c=1 sm=1 tr=0 ts=6ad0a90f cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=Z62H7OANAOBda0uacUIA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 phishscore=0 suspectscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150041 On 10/8/26 10:10 AM, Shawn Guo wrote: > The video clock controller binding describes three clock inputs for > SM8750: the board XO, the always-on board XO and the 32 kHz sleep clock. > The videocc node instead passes the board XO and GCC_VIDEO_AHB_CLK, > which is not an input of the controller. > > Pass bi_tcxo_ao_div2 and the board sleep clock in place of the AHB > clock. No functional change, GCC_VIDEO_AHB_CLK is enabled independently > of this node. > > Assisted-by: LLM > Signed-off-by: Shawn Guo > --- Reviewed-by: Konrad Dybcio Konrad