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Thu, 05 Nov 2026 13:38:59 -0800 (PST) Received: from [192.168.1.9] ([106.222.231.155]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36f72dc30ebsm1033032eec.13.2026.11.05.13.38.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Nov 2026 13:38:58 -0800 (PST) Message-ID: <9d91e39c-e29d-4e1f-804c-779a3aea21ff@oss.qualcomm.com> Date: Fri, 6 Nov 2026 03:08:52 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 04/15] drm/msm/a8xx: Export slice helper To: Rob Clark , dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Alexander Koskovich , Jie Zhang , Bhaskar Reddy Valluru , Nico Angelo Dela Cruz , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , open list References: <20261105203057.66520-1-robin.clark@oss.qualcomm.com> <20261105203057.66520-5-robin.clark@oss.qualcomm.com> Content-Language: en-US From: Akhil P Oommen In-Reply-To: <20261105203057.66520-5-robin.clark@oss.qualcomm.com> Content-Type: text/plain; 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> u64 a8xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate); > int a8xx_gpu_feature_probe(struct msm_gpu *gpu); > void a8xx_gpu_get_slice_info(struct msm_gpu *gpu); > +u32 a8xx_get_first_slice(struct a6xx_gpu *a6xx_gpu); > int a8xx_hw_init(struct msm_gpu *gpu); > irqreturn_t a8xx_irq(struct msm_gpu *gpu); > void a8xx_llc_activate(struct a6xx_gpu *a6xx_gpu); > diff --git a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c > index be81f141300f..a29f8149493c 100644 > --- a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c > @@ -130,7 +130,7 @@ void a8xx_gpu_get_slice_info(struct msm_gpu *gpu) > } > } > > -static u32 a8xx_get_first_slice(struct a6xx_gpu *a6xx_gpu) > +u32 a8xx_get_first_slice(struct a6xx_gpu *a6xx_gpu) > { > return ffs(a6xx_gpu->slice_mask) - 1; > }