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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-61cfc1c7edcsm9627002a12.6.2025.09.02.05.29.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 02 Sep 2025 05:29:46 -0700 (PDT) Message-ID: <9df42327-b417-454d-9f4a-608979498f79@oss.qualcomm.com> Date: Tue, 2 Sep 2025 14:29:43 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] drm/msm/a6xx: Fix GMU firmware parser To: Akhil P Oommen , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Konrad Dybcio , Jordan Crouse , Jonathan Marek Cc: Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20250902-assorted-sept-1-v1-0-f3ec9baed513@oss.qualcomm.com> <20250902-assorted-sept-1-v1-2-f3ec9baed513@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250902-assorted-sept-1-v1-2-f3ec9baed513@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: tS2zLnajK6-_qC6B9gLJVGgpe02y1Tzr X-Proofpoint-GUID: tS2zLnajK6-_qC6B9gLJVGgpe02y1Tzr X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODMwMDAyMCBTYWx0ZWRfX3jpgjLewJhd+ i1zLta/luxSOn2trYTIz9kDo11yuzrK+XMbau7gQlSx1+KanXccSEVUrvUYa27cqPI38UHgREfb lkA4ubKOqkik2o4kBmK6nbGb66ztnUwdzVPgvq4/wIkg3ie/fN/yPUFttWqtP7iu83KRaRAyuJo frv/uNHeFp+ohpasXe1qq0inWUn+oGZQOjrPtM53XuFBJM31qcl5L5uYFrJWP62jmWtoxKPGjtM WZtrMKVIVSNBZ6P5veu+xKZHboKm9y0Rdhp5v6PQQniKSMRZcSvLCBcvEgD/FOd4N0eMJqD7xAf vo1TXlXks1ZMRiNZw07cp0pt91lxzPCwl3mWreVJrft2XJyAKbDNpz/3EJKhOMGn6NR5voHSgZe ni/yKkMQ X-Authority-Analysis: v=2.4 cv=VNndn8PX c=1 sm=1 tr=0 ts=68b6e33d cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=B4Uh0k_u2pjkwks94HoA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-02_04,2025-08-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 impostorscore=0 malwarescore=0 bulkscore=0 clxscore=1015 adultscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508300020 On 9/2/25 1:50 PM, Akhil P Oommen wrote: > Current parser logic for GMU firmware assumes a dword aligned payload > size for every block. This is not true for all GMU firmwares. So, fix > this by using correct 'size' value in the calculation for the offset > for the next block's header. Hm, I haven't seen this in the wild - do you have any specific examples? > > Fixes: c6ed04f856a4 ("drm/msm/a6xx: A640/A650 GMU firmware path") > Signed-off-by: Akhil P Oommen > --- > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > index 28e6705c6da682c7b41c748e375dda59a6551898..ea52374c9fcd481d816ed9608e9f6eb1c2e3005a 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c > @@ -758,6 +758,8 @@ static bool fw_block_mem(struct a6xx_gmu_bo *bo, const struct block_header *blk) > return true; > } > > +#define NEXT_BLK(blk) ((const struct block_header *)((const char *)blk + sizeof(*blk) + blk->size)) CHECK: Macro argument 'blk' may be better as '(blk)' to avoid precedence issues #146: FILE: drivers/gpu/drm/msm/adreno/a6xx_gmu.c:761: +#define NEXT_BLK(blk) ((const struct block_header *)((const char *)blk + sizeof(*blk) + blk->size)) Konrad