From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 365A5C3A5A3 for ; Tue, 27 Aug 2019 10:59:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 08E4A20674 for ; Tue, 27 Aug 2019 10:59:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="LRt7deMt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728836AbfH0K7f (ORCPT ); Tue, 27 Aug 2019 06:59:35 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:52900 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725793AbfH0K7e (ORCPT ); Tue, 27 Aug 2019 06:59:34 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x7RAxF45051356; Tue, 27 Aug 2019 05:59:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1566903555; bh=5L8fTBAPAUD1wvBa2VIqOhwiyYh0NH9SJJH4PTKUqsY=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=LRt7deMtZhLAFFrLeVm+jWzpQxgCHZIihH4jFGB0DFLIX7uwJPkfk01JgmGJ4lwXG u2Th8oXO0O2XLXWKuIZ6H//GX2RBC/hlxxPz3ptEcJUmYJfIV3aiXn+X4SSF7/7rpf MjaMRHr8i539FlB++abyxPfHd9vZKbQ7JWYfmIFo= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x7RAxFSg029003 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 27 Aug 2019 05:59:15 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 27 Aug 2019 05:59:14 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 27 Aug 2019 05:59:14 -0500 Received: from [172.24.145.136] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x7RAxAKl111334; Tue, 27 Aug 2019 05:59:11 -0500 Subject: Re: [Patch v3] drivers: mtd: spi-nor: Add flash property for mt25qu512a and mt35xu02g To: Ashish Kumar , , , , , , , CC: , Kuldeep Singh References: <1565692705-27749-1-git-send-email-Ashish.Kumar@nxp.com> From: Vignesh Raghavendra Message-ID: <9e1986a4-abe6-60f7-5b21-82ff8145f2cc@ti.com> Date: Tue, 27 Aug 2019 16:29:48 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <1565692705-27749-1-git-send-email-Ashish.Kumar@nxp.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/08/19 4:08 PM, Ashish Kumar wrote: > mt25qu512a is rebranded after its spinoff from STM, so it is > different only in term of operating frequency, initial JEDEC id > is same as that of n25q512a. In order to avoid any confussion > with respect to name new entry is added. > This flash is tested for Single I/O and QUAD I/O mode on LS1046FRWY. > > mt35xu02g is Octal flash supporting Single I/O and QCTAL I/O > and it has been tested on LS1028ARDB > $subject should start as "mtd: spi-nor:" and should be tweaked as: mtd: spi-nor: Add mt25qu512a and mt35xu02g flash entries May be Tudor can fix this while applying, if there are no further comments. Regards Vignesh > Signed-off-by: Kuldeep Singh > Signed-off-by: Ashish Kumar > --- > v3: > -Reword commits msg > -rebase to top of mtd-linux spi-nor/next > v2: > Incorporate review comments from Vignesh > > drivers/mtd/spi-nor/spi-nor.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index 03cc788..97d3de8 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -1988,6 +1988,12 @@ static const struct flash_info spi_nor_ids[] = { > { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, > { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) }, > + > + /* Micron */ > + { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024, SECT_4K | > + USE_FSR | SPI_NOR_DUAL_READ | > + SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > + > { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, > { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, > { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > @@ -2003,6 +2009,9 @@ static const struct flash_info spi_nor_ids[] = { > SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | > SPI_NOR_4B_OPCODES) > }, > + { "mt35xu02g", INFO(0x2c5b1c, 0, 128 * 1024, 2048, > + SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | > + SPI_NOR_4B_OPCODES) }, > > /* PMC */ > { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, > -- Regards Vignesh