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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: gjjOs6vlb6d5CybvNLzd6JAOFHSS-tAN X-Proofpoint-ORIG-GUID: gjjOs6vlb6d5CybvNLzd6JAOFHSS-tAN X-Authority-Analysis: v=2.4 cv=Xbm5Co55 c=1 sm=1 tr=0 ts=6a465394 cx=c_pps a=ULNsgckmlI/WJG3HAyAuOQ==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=Noy9YD-PShQqXFI-NKcA:9 a=QEXdDO2ut3YA:10 a=1WsBpfsz9X-RYQiigVTh:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzAyMDEyNSBTYWx0ZWRfXw+xoqbgEyMcd bvMlGRoAth6TXFqi9SXhLumq6PbiOiJIni8PtVu7NBapeR0IrmKRt8Ezid8WaWKoxHJyC6rC/Fr zpVXpL/O/oB53dTpufulELLdLQ+KFC6PD5w+QfJP8WIOAvRd5yyikuD5lLuUat76tIhdzZdIqj5 0+RbLJ76Pc6KFhoJi/6jbJhPV+fr97NCBV8sSoa/OU58a88xixN0ToQ6bvZWTAHkTbPcDwTYKgT 6DSEPGwnLxi+mdPOK7RhF/7qeCcbaVTW8nC3uCS7rt6LfESDmdWMCoGEKaoQ9z9DdHimvGHHsf9 TmPFMC9Gb5ZcUTaWw5XvibfJictvNoJBeXBJEKsHM7kZBK1+xAtqnR11K/Z7uq7OgcExgbMyr28 2pmiFSH9N+bHeeZRf4RAm7j8UCm3MAC9z5ETUjZtWgBVMOmSZgu+8Gn0mGbRju6FmpWexsyBRXO YErNZxcGOwsvKRnDkSQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzAyMDEyNSBTYWx0ZWRfX2dbY0HaYjn80 L74ojmgWaUrzapNJNNygo/NnAU1IG/J8sjQFtd+dAQwX0SWS74m8GjHPTI6dSKNxBam8NdSIR7c BvNw/j1dEd8qGus/+89Pziyzlc0kbIo= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-07-02_01,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 adultscore=0 phishscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607020125 On 7/2/26 1:40 PM, Dmitry Baryshkov wrote: > There is a confusion regarding the autoresume bit. Some verions of the > QUSB2 PHY have it in the TEST1 register, while on the others it is a > part of the TEST_CTRL register. When adding support for autoresume bit, > the code attempted to simplify the handling of those registers, putting > both registers to the TEST1 layout entry. In the end, > ipq6018_regs_layout ended up correctly definig TEST1 register at 0x98 > (because platforms using that layout didn't use autoresume), while > msm8996_regs_layout used TEST_CTRL offset (0xb8) for the TEST1 > layout entry. > > Update the platform data to specify the register to be used for > autoresume handling, define both TEST1 and TEST_CTRL registers and merge > ipq6018_regs_layout and msm8996_regs_layout which become identical > afterwards. > > Fixes: 891a96f65ac3 ("phy: qcom-qusb2: Add support for runtime PM") > Signed-off-by: Dmitry Baryshkov > --- Reviewed-by: Konrad Dybcio Konrad