From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Prabhakar <prabhakar.csengg@gmail.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 2/2] clk: renesas: r9a09g057: Add PCIe clocks and reset
Date: Thu, 19 Mar 2026 07:23:12 +0200 [thread overview]
Message-ID: <9e97bf7d-57f2-4c25-95e0-84d63bc48e47@tuxon.dev> (raw)
In-Reply-To: <20260312111521.115392-3-prabhakar.mahadev-lad.rj@bp.renesas.com>
On 3/12/26 13:15, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add clocks and reset entries for the PCIe controller.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
prev parent reply other threads:[~2026-03-19 5:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-12 11:15 [PATCH 0/2] Add PCIe clocks and reset for R9A09G056 and R9A09G057 SoCs Prabhakar
2026-03-12 11:15 ` [PATCH 1/2] clk: renesas: r9a09g056: Add PCIe clocks and reset Prabhakar
2026-03-18 14:33 ` Geert Uytterhoeven
2026-03-19 5:20 ` Claudiu Beznea
2026-03-12 11:15 ` [PATCH 2/2] clk: renesas: r9a09g057: " Prabhakar
2026-03-18 14:35 ` Geert Uytterhoeven
2026-03-18 20:50 ` Lad, Prabhakar
2026-03-19 5:23 ` Claudiu Beznea [this message]
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